Author: Snezana Jenei
Publisher:
ISBN:
Category : Bipolar integrated circuits
Languages : en
Pages : 256

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Author: Daihyun Lim
Publisher:
ISBN:
Category :
Languages : en
Pages : 174

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Continuous scaling of CMOS technology has enabled dramatic performance enhancement of CMOS devices and has provided speed, power, and density improvement in both digital and analog circuits. CMOS millimeter-wave applications operating at more than 50GHz frequencies has become viable in sub-100nm CMOS technologies, providing advantages in cost and high density integration compared to other heterogeneous technologies such as SiGe and III-V compound semiconductors. However, as the operating frequency of CMOS circuits increases, it becomes more difficult to obtain sufficiently wide operating ranges for robust operation in essential analog building blocks such as voltage-controlled oscillators (VCOs) and frequency dividers. The fluctuations of circuit parameters caused by the random and systematic variations in key manufacturing steps become more significant in nano-scale technologies. The process variation of circuit performance is quickly becoming one of the main concerns in high performance analog design. In this thesis, we show design and analysis of a VCO and frequency divider operating beyond 70GHz in a 65nm SOI CMOS technology. The VCO and frequency divider employ design techniques enlarging frequency operating ranges to improve the robustness of circuit operation. Circuit performance is measured from a number of die samples to identify the statistical properties of performance variation. A back-propagation of variation (BPV) scheme based on sensitivity analysis of circuit performance is proposed to extract critical circuit parameter variation using statistical measurement results of the frequency divider. We analyze functional failure caused by performance variability, and propose dynamic and static optimization methods to improve parametric yield. An external bias control is utilized to dynamically tune the divider operating range and to compensate for performance variation. A novel time delay model of a differential CML buffer is proposed to functionally approximate the maximum operating frequency of the frequency divider, which dramatically reduces computational cost of parametric yield estimation. The functional approximation enables the optimization of the VCO and frequency divider parametric yield with a reasonable amount of simulation time.

Author: M. Jamal Deen
Publisher: World Scientific
ISBN: 9789810249052
Category : Science
Languages : en
Pages : 426

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CMOS technology has now reached a state of evolution, in terms of both frequency and noise, where it is becoming a serious contender for radio frequency (RF) applications in the GHz range. Cutoff frequencies of about 50 GHz have been reported for 0.18 æm CMOS technology, and are expected to reach about 100 GHz when the feature size shrinks to 100 nm within a few years. This translates into CMOS circuit operating frequencies well into the GHz range, which covers the frequency range of many of today's popular wireless products, such as cell phones, GPS (Global Positioning System) and Bluetooth. Of course, the great interest in RF CMOS comes from the obvious advantages of CMOS technology in terms of production cost, high-level integration, and the ability to combine digital, analog and RF circuits on the same chip. This book discusses many of the challenges facing the CMOS RF circuit designer in terms of device modeling and characterization, which are crucial issues in circuit simulation and design.

Author: Fakhfakh, Mourad
Publisher: IGI Global
ISBN: 1466666285
Category : Technology & Engineering
Languages : en
Pages : 488

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Improving the performance of existing technologies has always been a focal practice in the development of computational systems. However, as circuitry is becoming more complex, conventional techniques are becoming outdated and new research methodologies are being implemented by designers. Performance Optimization Techniques in Analog, Mix-Signal, and Radio-Frequency Circuit Design features recent advances in the engineering of integrated systems with prominence placed on methods for maximizing the functionality of these systems. This book emphasizes prospective trends in the field and is an essential reference source for researchers, practitioners, engineers, and technology designers interested in emerging research and techniques in the performance optimization of different circuit designs.

Author: Ahmed A. Youssef
Publisher: Springer Science & Business Media
ISBN: 9048186048
Category : Technology & Engineering
Languages : en
Pages : 168

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Nanometer CMOS RFICs for Mobile TV Applications focuses on how to break the trade-off between power consumption and performance (linearity and noise figure) by optimizing the mobile TV front-end dynamic range in three hierarchical levels: the intrinsic MOSFET level, the circuit level, and the architectural level. It begins by discussing the fundamental concepts of MOSFET dynamic range, including nonlinearity and noise. It then moves to the circuit level introducing the challenges associated with designing wide-dynamic range, variable-gain, broadband low-noise amplifiers (LNAs). The book gives a detailed analysis of a new noise-canceling technique that helps CMOS LNAs achieve a sub - 2 dB wideband noise figure. Lastly, the book deals with the front-end dynamic range optimization process from the systems perspective by introducing the active and passive automatic gain control (AGC) mechanism.

Author: Andrea Maniero
Publisher:
ISBN:
Category :
Languages : en
Pages :

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Author: Srikanth Jagannathan
Publisher:
ISBN:
Category : Electronic dissertations
Languages : en
Pages : 208

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Author: Hari Chauhan
Publisher:
ISBN:
Category : Analog integrated circuits
Languages : en
Pages : 122

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High-performance low-cost radio frequency (RF) transceivers are essential in today's wireless systems. Contemporary manufacturing process technologies and device scaling have helped the integration of analog and RF circuits with high performance, but often with high sensitivity to increasing process variations when chips are fabricated in high volumes. This trend has motivated designers to incorporate more digital circuits for performance optimizations of analog/RF circuits. A repercussion of adding on-chip circuits is the rise of design and verification complexity of RF devices, which is paral-leled by demands for shorter design cycles and better reliability. These challenges create the need for improved simulation and testing methodologies. This dissertation focuses on the design and integration of digital circuits with ana-log/RF circuits for performance optimizations. Spectral analysis for the evaluation of analog/RF circuits is a standard procedure for which the fast Fourier transform (FFT) algorithm is widely used. However, the majority of existing FFT implementations on chips consume excessive area and power for built-in testing applications. In this research, an FFT-based performance monitoring technique with multi-tone test signals has been created for efficient on-chip spectral analysis of analog/RF circuits. This method enables to estimate third-order intermodulation components of up to 50 dB below the fundamen-tal tones with an accuracy of ±1.5 dB based on the output spectrum of analog circuits. The capability of this technique to accurately determine the power of two test tones as well as their distortion components and intermodulation products was demonstrated by designing an on-chip linearity calibration scheme for a tunable low-noise amplifier. A key aspect of practical circuit and system design is to ensure high performance with high reliability and low cost. Therefore, it is advantageous to utilize test and simula-tion methods for simultaneous optimization of a design under test and a performance enhancement technique (e.g., self-calibration circuits and linearization methods) prior to fabrication of chips or systems. In this research, a simulation approach to concurrently design and optimize an entire system at a desired abstraction level was developed for integrated amplifiers. The design and optimization of a 10 W inverted Doherty power amplifier (PA) with a digital predistortion (DPD) linearization technique was completed to exemplify the effectiveness of the simulation platform. In addition, an integrated hardware-software co-design approach that allows DPD tuning to meet specification requirements with minimum resources was developed together with industrial collabora-tors. Tuning of the DPD technique was performed with several off-the-shelf power amplifiers for performance optimization of the integrated PA-DPD system. Furthermore, a tuning method was developed that incorporates a digital-to-analog converter in the integrated PA-DPD system. With this approach, the error signal generated by the digital predistortion technique can be utilized to automatically tune a bias voltage in the power amplifier for optimal performance. Simulation results from a closed-loop system consist-ing of an inverted Doherty power amplifier with digital predistortion were evaluated to validate the tuning mechanism.

Author: Hartmut Grabinski
Publisher: Springer Science & Business Media
ISBN: 1461543495
Category : Technology & Engineering
Languages : en
Pages : 234

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Book Description
This book presents an updated selection of the most representative contributions to the 2nd and 3rd IEEE Workshops on Signal Propagation on Interconnects (SPI) which were held in Travemtinde (Baltic See Side), Germany, May 13-15, 1998, and in Titisee-Neustadt (Black Forest), Germany, May 19-21, 1999. This publication addresses the need of developers and researchers in the field of VLSI chip and package design. It offers a survey of current problems regarding the influence of interconnect effects on the electrical performance of electronic circuits and suggests innovative solutions. In this sense the present book represents a continua tion and a supplement to the first book "Signal Propagation on Interconnects", Kluwer Academic Publishers, 1998. The papers in this book cover a wide area of research directions: Beneath the des cription of general trends they deal with the solution of signal integrity problems, the modeling of interconnects, parameter extraction using calculations and measurements and last but not least actual problems in the field of optical interconnects.

Author:
Publisher:
ISBN:
Category : Electrical engineering
Languages : en
Pages : 1860

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