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Author: Parag K. Lala
Publisher: Morgan Kaufmann
ISBN: 9780124343702
Category : Computers
Languages : en
Pages : 238
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Book Description
With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation. Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems. Features: Introduces reliability theory and the importance of maintainability Presents coding and the construction of several error detecting and correcting codes Discusses in depth, the available techniques for fail-safe design of combinational circuits Details checker design techniques for detecting erroneous bits and encoding output of self-checking circuits Demonstrates how to design self-checking sequential circuits, including a technique for fail-safe state machine design
Author: Parag K. Lala
Publisher: Morgan Kaufmann
ISBN: 9780124343702
Category : Computers
Languages : en
Pages : 238
Get Book
Book Description
With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation. Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems. Features: Introduces reliability theory and the importance of maintainability Presents coding and the construction of several error detecting and correcting codes Discusses in depth, the available techniques for fail-safe design of combinational circuits Details checker design techniques for detecting erroneous bits and encoding output of self-checking circuits Demonstrates how to design self-checking sequential circuits, including a technique for fail-safe state machine design
Author: Parag K. Lala
Publisher:
ISBN:
Category : Computers
Languages : en
Pages : 440
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Book Description
This text presents the essentials of modern logic design. The author conveys key concepts in a clear, informal manner, demonstrating theory through numerous examples to establish a theoretical basis for practical applications. All major topics, including PLD-based digital design, are covered, and detailed coverage of digital logic circuit testing methods critical to successful chip manufacturing, are included. The industry standard PLD programming language ABEL is fully integrated where appropriate. The work also includes coverage of test generation techniques and design methods for testability, a complete discussion of PLD (Programmable Logic Device) based digital design, and coverage of state assignment and minimization explained using computer aided techniques.
Author: Niraj K. Jha
Publisher: Springer Science & Business Media
ISBN: 1461315255
Category : Computers
Languages : en
Pages : 239
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Book Description
In the last few years CMOS technology has become increas ingly dominant for realizing Very Large Scale Integrated (VLSI) circuits. The popularity of this technology is due to its high den sity and low power requirement. The ability to realize very com plex circuits on a single chip has brought about a revolution in the world of electronics and computers. However, the rapid advance ments in this area pose many new problems in the area of testing. Testing has become a very time-consuming process. In order to ease the burden of testing, many schemes for designing the circuit for improved testability have been presented. These design for testability techniques have begun to catch the attention of chip manufacturers. The trend is towards placing increased emphasis on these techniques. Another byproduct of the increase in the complexity of chips is their higher susceptibility to faults. In order to take care of this problem, we need to build fault-tolerant systems. The area of fault-tolerant computing has steadily gained in importance. Today many universities offer courses in the areas of digital system testing and fault-tolerant computing. Due to the impor tance of CMOS technology, a significant portion of these courses may be devoted to CMOS testing. This book has been written as a reference text for such courses offered at the senior or graduate level. Familiarity with logic design and switching theory is assumed. The book should also prove to be useful to professionals working in the semiconductor industry.
Author: Parag K. Lala
Publisher: Prentice Hall
ISBN:
Category : Computers
Languages : en
Pages : 296
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Book Description
Author: Barry W. Johnson
Publisher:
ISBN:
Category : Fault-tolerant computing
Languages : en
Pages : 624
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Book Description
Author: Eiji Fujiwara
Publisher: John Wiley & Sons
ISBN: 047179273X
Category : Science
Languages : en
Pages : 718
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Book Description
Theoretical and practical tools to master matrix code design strategy and technique Error correcting and detecting codes are essential to improving system reliability and have popularly been applied to computer systems and communication systems. Coding theory has been studied mainly using the code generator polynomials; hence, the codes are sometimes called polynomial codes. On the other hand, the codes designed by parity check matrices are referred to in this book as matrix codes. This timely book focuses on the design theory for matrix codes and their practical applications for the improvement of system reliability. As the author effectively demonstrates, matrix codes are far more flexible than polynomial codes, as they are capable of expressing various types of code functions. In contrast to other coding theory publications, this one does not burden its readers with unnecessary polynomial algebra, but rather focuses on the essentials needed to understand and take full advantage of matrix code constructions and designs. Readers are presented with a full array of theoretical and practical tools to master the fine points of matrix code design strategy and technique: * Code designs are presented in relation to practical applications, such as high-speed semiconductor memories, mass memories of disks and tapes, logic circuits and systems, data entry systems, and distributed storage systems * New classes of matrix codes, such as error locating codes, spotty byte error control codes, and unequal error control codes, are introduced along with their applications * A new parallel decoding algorithm of the burst error control codes is demonstrated In addition to the treatment of matrix codes, the author provides readers with a general overview of the latest developments and advances in the field of code design. Examples, figures, and exercises are fully provided in each chapter to illustrate concepts and engage the reader in designing actual code and solving real problems. The matrix codes presented with practical parameter settings will be very useful for practicing engineers and researchers. References lead to additional material so readers can explore advanced topics in depth. Engineers, researchers, and designers involved in dependable system design and code design research will find the unique focus and perspective of this practical guide and reference helpful in finding solutions to many key industry problems. It also can serve as a coursebook for graduate and advanced undergraduate students.
Author: Parag K. Lala
Publisher: Springer Nature
ISBN: 303179785X
Category : Technology & Engineering
Languages : en
Pages : 99
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Book Description
An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips. Table of Contents: Introduction / Fault Detection in Logic Circuits / Design for Testability / Built-in Self-Test / References
Author: Elena Dubrova
Publisher: Springer Science & Business Media
ISBN: 1461421136
Category : Technology & Engineering
Languages : en
Pages : 195
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Book Description
This textbook serves as an introduction to fault-tolerance, intended for upper-division undergraduate students, graduate-level students and practicing engineers in need of an overview of the field. Readers will develop skills in modeling and evaluating fault-tolerant architectures in terms of reliability, availability and safety. They will gain a thorough understanding of fault tolerant computers, including both the theory of how to design and evaluate them and the practical knowledge of achieving fault-tolerance in electronic, communication and software systems. Coverage includes fault-tolerance techniques through hardware, software, information and time redundancy. The content is designed to be highly accessible, including numerous examples and exercises. Solutions and powerpoint slides are available for instructors.
Author: Michael Gössel
Publisher: Springer Science & Business Media
ISBN: 140208420X
Category : Technology & Engineering
Languages : en
Pages : 186
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Book Description
Computers are everywhere around us. We, for example, as air passengers, car drivers, laptop users with Internet connection, cell phone owners, hospital patients, inhabitants in the vicinity of a nuclear power station, students in a digital library or customers in a supermarket are dependent on their correct operation. Computers are incredibly fast, inexpensive and equipped with almost unimag- able large storage capacity. Up to 100 million transistors per chip are quite common today - a single transistor for each citizen of a large capital city in the world can be 2 easily accommodated on an ordinary chip. The size of such a chip is less than 1 cm . This is a fantastic achievement for an unbelievably low price. However, the very small and rapidly decreasing dimensions of the transistors and their connections over the years are also the reason for growing problems with reliability that will dramatically increase for the nano-technologies in the near future. Can we always trust computers? Are computers always reliable? Are chips suf- ciently tested with respect to all possible permanent faults if we buy them at a low price or have errors due to undetected permanent faults to be discovered by c- current checking? Besides permanent faults, many temporary or transient faults are also to be expected.
Author: Mostafa Abd-El-Barr
Publisher: World Scientific
ISBN: 190897978X
Category : Computers
Languages : en
Pages : 464
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Book Description
Covering both the theoretical and practical aspects of fault-tolerant mobile systems, and fault tolerance and analysis, this book tackles the current issues of reliability-based optimization of computer networks, fault-tolerant mobile systems, and fault tolerance and reliability of high speed and hierarchical networks. The book is divided into six parts to facilitate coverage of the material by course instructors and computer systems professionals. The sequence of chapters in each part ensures the gradual coverage of issues from the basics to the most recent developments. A useful set of references, including electronic sources, is listed at the end of each chapter. Contents:Fundamental Concepts in Fault Tolerance and Reliability AnalysisFault Modeling, Simulation and DiagnosisError Control and Self-Checking CircuitsFault Tolerance in Multiprocessor SystemsFault-Tolerant Routing in Multi-Computer NetworksFault Tolerance and Reliability in Hierarchical Interconnection NetworksFault Tolerance and Reliability of Computer NetworksFault Tolerance in High Speed Switching NetworksFault Tolerance in Distributed and Mobile Computing SystemsFault Tolerance in Mobile NetworksReliability and Yield Enhancement of VLSI/WSI CircuitsDesign of fault-tolerant Processor ArraysAlgorithm-Based Fault ToleranceSystem Level Diagnosis ISystem Level Diagnosis IIFault Tolerance and Reliability of RAID SystemsHigh Availability in Computer Systems Readership: Computer engineers, computer scientists, information scientists, graduate and senior undergraduate students in information science and computer engineering. Keywords:Fault Tolerance;Reliability;Availability;Fault Modeling;Fault Diagnosis;Network ReliabilityKey Features:Comprehensive coverage of issues in fault tolerance and reliability analysisSimple treatment of difficult issues via examples with figures, tables and graphs
