Author: Vishram S. Pandit
Publisher: Pearson Education
ISBN: 0132596962
Category : Technology & Engineering
Languages : en
Pages : 466
Book Description
Foreword by Joungho Kim The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts In this book, three industry experts introduce state-of-the-art power integrity design techniques for today’s most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability. After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB power distribution networks (PDNs) and signal networks, carefully reviewing their interactions. Next, they walk through end-to-end PDN and signal network design in frequency domain, addressing crucial parameters such as self and transfer impedance. They thoroughly address modeling and characterization of on-chip components of PDNs and signal networks, evaluation of power-to-signal coupling coefficients, analysis of Simultaneous Switching Output (SSO) noise, and many other topics. Coverage includes The exponentially growing challenge of I/O power integrity in high-speed digital systems PDN noise analysis and its timing impact for single-ended and differential interfaces Concurrent design and co-simulation techniques for evaluating all power integrity effects on signal integrity Time domain gauges for designing and optimizing components and systems Power/signal integrity interaction mechanisms, including power noise coupling onto signal trace and noise amplification through signal resonance Performance impact due to Inter Symbol Interference (ISI), crosstalk, and SSO noise, as well as their interactions Validation techniques, including low impedance VNA measurements, power noise measurements, and characterization of power-to-signal coupling effects Power Integrity for I/O Interfaces will be an indispensable resource for everyone concerned with power integrity in cutting-edge digital designs, including system design and hardware engineers, signal and power integrity engineers, graduate students, and researchers.
Power Integrity for I/O Interfaces
Author: Vishram S. Pandit
Publisher: Pearson Education
ISBN: 0132596962
Category : Technology & Engineering
Languages : en
Pages : 466
Book Description
Foreword by Joungho Kim The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts In this book, three industry experts introduce state-of-the-art power integrity design techniques for today’s most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability. After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB power distribution networks (PDNs) and signal networks, carefully reviewing their interactions. Next, they walk through end-to-end PDN and signal network design in frequency domain, addressing crucial parameters such as self and transfer impedance. They thoroughly address modeling and characterization of on-chip components of PDNs and signal networks, evaluation of power-to-signal coupling coefficients, analysis of Simultaneous Switching Output (SSO) noise, and many other topics. Coverage includes The exponentially growing challenge of I/O power integrity in high-speed digital systems PDN noise analysis and its timing impact for single-ended and differential interfaces Concurrent design and co-simulation techniques for evaluating all power integrity effects on signal integrity Time domain gauges for designing and optimizing components and systems Power/signal integrity interaction mechanisms, including power noise coupling onto signal trace and noise amplification through signal resonance Performance impact due to Inter Symbol Interference (ISI), crosstalk, and SSO noise, as well as their interactions Validation techniques, including low impedance VNA measurements, power noise measurements, and characterization of power-to-signal coupling effects Power Integrity for I/O Interfaces will be an indispensable resource for everyone concerned with power integrity in cutting-edge digital designs, including system design and hardware engineers, signal and power integrity engineers, graduate students, and researchers.
Publisher: Pearson Education
ISBN: 0132596962
Category : Technology & Engineering
Languages : en
Pages : 466
Book Description
Foreword by Joungho Kim The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts In this book, three industry experts introduce state-of-the-art power integrity design techniques for today’s most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability. After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB power distribution networks (PDNs) and signal networks, carefully reviewing their interactions. Next, they walk through end-to-end PDN and signal network design in frequency domain, addressing crucial parameters such as self and transfer impedance. They thoroughly address modeling and characterization of on-chip components of PDNs and signal networks, evaluation of power-to-signal coupling coefficients, analysis of Simultaneous Switching Output (SSO) noise, and many other topics. Coverage includes The exponentially growing challenge of I/O power integrity in high-speed digital systems PDN noise analysis and its timing impact for single-ended and differential interfaces Concurrent design and co-simulation techniques for evaluating all power integrity effects on signal integrity Time domain gauges for designing and optimizing components and systems Power/signal integrity interaction mechanisms, including power noise coupling onto signal trace and noise amplification through signal resonance Performance impact due to Inter Symbol Interference (ISI), crosstalk, and SSO noise, as well as their interactions Validation techniques, including low impedance VNA measurements, power noise measurements, and characterization of power-to-signal coupling effects Power Integrity for I/O Interfaces will be an indispensable resource for everyone concerned with power integrity in cutting-edge digital designs, including system design and hardware engineers, signal and power integrity engineers, graduate students, and researchers.
Power Integrity for I/O Interfaces
Author: Vishram Shriram Pandit
Publisher: Pearson Education
ISBN: 9780137011193
Category : Computer interfaces
Languages : en
Pages : 0
Book Description
Foreword by Joungho Kim The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts In this book, three industry experts introduce state-of-the-art power integrity design techniques for today's most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability. After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB power distribution networks (PDNs) and signal networks, carefully reviewing their interactions. Next, they walk through end-to-end PDN and signal network design in frequency domain, addressing crucial parameters such as self and transfer impedance. They thoroughly address modeling and characterization of on-chip components of PDNs and signal networks, evaluation of power-to-signal coupling coefficients, analysis of Simultaneous Switching Output (SSO) noise, and many other topics. Coverage includes * The exponentially growing challenge of I/O power integrity in high-speed digital systems * PDN noise analysis and its timing impact for single-ended and differential interfaces * Concurrent design and co-simulation techniques for evaluating all power integrity effects on signal integrity * Time domain gauges for designing and optimizing components and systems * Power/signal integrity interaction mechanisms, including power noise coupling onto signal trace and noise amplification through signal resonance * Performance impact due to Inter Symbol Interference (ISI), crosstalk, and SSO noise, as well as their interactions * Validation techniques, including low impedance VNA measurements, power noise measurements, and characterization of power-to-signal coupling effects Power Integrity for I/O Interfaces will be an indispensable resource for everyone concerned with power integrity in cutting-edge digital designs, including system design and hardware engineers, signal and power integrity engineers, graduate students, and researchers.
Publisher: Pearson Education
ISBN: 9780137011193
Category : Computer interfaces
Languages : en
Pages : 0
Book Description
Foreword by Joungho Kim The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts In this book, three industry experts introduce state-of-the-art power integrity design techniques for today's most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability. After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB power distribution networks (PDNs) and signal networks, carefully reviewing their interactions. Next, they walk through end-to-end PDN and signal network design in frequency domain, addressing crucial parameters such as self and transfer impedance. They thoroughly address modeling and characterization of on-chip components of PDNs and signal networks, evaluation of power-to-signal coupling coefficients, analysis of Simultaneous Switching Output (SSO) noise, and many other topics. Coverage includes * The exponentially growing challenge of I/O power integrity in high-speed digital systems * PDN noise analysis and its timing impact for single-ended and differential interfaces * Concurrent design and co-simulation techniques for evaluating all power integrity effects on signal integrity * Time domain gauges for designing and optimizing components and systems * Power/signal integrity interaction mechanisms, including power noise coupling onto signal trace and noise amplification through signal resonance * Performance impact due to Inter Symbol Interference (ISI), crosstalk, and SSO noise, as well as their interactions * Validation techniques, including low impedance VNA measurements, power noise measurements, and characterization of power-to-signal coupling effects Power Integrity for I/O Interfaces will be an indispensable resource for everyone concerned with power integrity in cutting-edge digital designs, including system design and hardware engineers, signal and power integrity engineers, graduate students, and researchers.
Power Integrity for I/O Interfaces
Author: Vishram S. Pandit
Publisher:
ISBN: 9780132596947
Category : Computer interfaces
Languages : en
Pages : 0
Book Description
Foreword by Joungho Kim The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts In this book, three industry experts introduce state-of-the-art power integrity design techniques for today's most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability. After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB power distribution networks (PDNs) and signal networks, carefully reviewing their interactions. Next, they walk through end-to-end PDN and signal network design in frequency domain, addressing crucial parameters such as self and transfer impedance. They thoroughly address modeling and characterization of on-chip components of PDNs and signal networks, evaluation of power-to-signal coupling coefficients, analysis of Simultaneous Switching Output (SSO) noise, and many other topics. Coverage includes • The exponentially growing challenge of I/O power integrity in high-speed digital systems • PDN noise analysis and its timing impact for single-ended and differential interfaces • Concurrent design and co-simulation techniques for evaluating all power integrity effects on signal integrity • Time domain gauges for designing and optimizing components and systems • Power/signal integrity interaction mechanisms, including power noise coupling onto signal trace and noise amplification through signal resonance • Performance impact due to Inter Symbol Interference (ISI), crosstalk, and SSO noise, as well as their interactions • Validation techniques, including low impedance VNA measurements, power noise measurements, and characterization of power-to-signal coupling effects Power Integrity for I/O Interfaces will be an indispensable resource for everyone concerned with power integrity in cutting-edge digital designs, including system design and hardware engineers, signal and power integrity engineers, graduate students, and researchers.
Publisher:
ISBN: 9780132596947
Category : Computer interfaces
Languages : en
Pages : 0
Book Description
Foreword by Joungho Kim The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts In this book, three industry experts introduce state-of-the-art power integrity design techniques for today's most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability. After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB power distribution networks (PDNs) and signal networks, carefully reviewing their interactions. Next, they walk through end-to-end PDN and signal network design in frequency domain, addressing crucial parameters such as self and transfer impedance. They thoroughly address modeling and characterization of on-chip components of PDNs and signal networks, evaluation of power-to-signal coupling coefficients, analysis of Simultaneous Switching Output (SSO) noise, and many other topics. Coverage includes • The exponentially growing challenge of I/O power integrity in high-speed digital systems • PDN noise analysis and its timing impact for single-ended and differential interfaces • Concurrent design and co-simulation techniques for evaluating all power integrity effects on signal integrity • Time domain gauges for designing and optimizing components and systems • Power/signal integrity interaction mechanisms, including power noise coupling onto signal trace and noise amplification through signal resonance • Performance impact due to Inter Symbol Interference (ISI), crosstalk, and SSO noise, as well as their interactions • Validation techniques, including low impedance VNA measurements, power noise measurements, and characterization of power-to-signal coupling effects Power Integrity for I/O Interfaces will be an indispensable resource for everyone concerned with power integrity in cutting-edge digital designs, including system design and hardware engineers, signal and power integrity engineers, graduate students, and researchers.
Power Integrity for I/O Interfaces
Author: Vishram S. Pandit
Publisher:
ISBN:
Category :
Languages : en
Pages : 417
Book Description
Foreword by Joungho Kim The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts In this book, three industry experts introduce state-of-the-art power integrity design techniques for today's most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability. After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB p.
Publisher:
ISBN:
Category :
Languages : en
Pages : 417
Book Description
Foreword by Joungho Kim The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts In this book, three industry experts introduce state-of-the-art power integrity design techniques for today's most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability. After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB p.
Energy Efficient Servers
Author: Corey Gough
Publisher: Apress
ISBN: 1430266384
Category : Computers
Languages : en
Pages : 347
Book Description
Energy Efficient Servers: Blueprints for Data Center Optimization introduces engineers and IT professionals to the power management technologies and techniques used in energy efficient servers. The book includes a deep examination of different features used in processors, memory, interconnects, I/O devices, and other platform components. It outlines the power and performance impact of these features and the role firmware and software play in initialization and control. Using examples from cloud, HPC, and enterprise environments, the book demonstrates how various power management technologies are utilized across a range of server utilization. It teaches the reader how to monitor, analyze, and optimize their environment to best suit their needs. It shares optimization techniques used by data center administrators and system optimization experts at the world’s most advanced data centers.
Publisher: Apress
ISBN: 1430266384
Category : Computers
Languages : en
Pages : 347
Book Description
Energy Efficient Servers: Blueprints for Data Center Optimization introduces engineers and IT professionals to the power management technologies and techniques used in energy efficient servers. The book includes a deep examination of different features used in processors, memory, interconnects, I/O devices, and other platform components. It outlines the power and performance impact of these features and the role firmware and software play in initialization and control. Using examples from cloud, HPC, and enterprise environments, the book demonstrates how various power management technologies are utilized across a range of server utilization. It teaches the reader how to monitor, analyze, and optimize their environment to best suit their needs. It shares optimization techniques used by data center administrators and system optimization experts at the world’s most advanced data centers.
Signal and Power Integrity in Digital Systems
Author: James Edgar Buchanan
Publisher:
ISBN:
Category : Computers
Languages : en
Pages : 408
Book Description
"This book shows designers how to ensure signal integrity and control noise in high-speed digital systems - particularly important in a Pentium-paced environment where functional logic design is no longer separable from electrical and mechanical design." "Highlighting TTL, CMOS, and BiCMOS logic applications in a single source, Signal and Power Integrity in Digital Systems provides a practical solutions-oriented approach to a wide variety of relevant interconnection and timing issues." "Special features include noise tolerant logic architectures; power distribution techniques that reduce noise; clock distribution techniques that ensure clock signal quality; signal interconnection techniques that reduce crosstalk, signal loading, and transmission-line effects; how to get optimum performance from high-speed memory devices; and system application tips for high-speed PALs, PLAs, FIFOs, and ASICs." "Designers will also appreciate the practical engineering approximations provided for the calculation of design parameters along with illustrations and numerous tables usable for quick reference and comparison of characteristics." "It's a book every digital designer should have - engineers involved in the design of computers, peripherals, signal processors, and control and communications equipment, as well as young engineers facing their first designs using high-speed logic devices."--BOOK JACKET.Title Summary field provided by Blackwell North America, Inc. All Rights Reserved
Publisher:
ISBN:
Category : Computers
Languages : en
Pages : 408
Book Description
"This book shows designers how to ensure signal integrity and control noise in high-speed digital systems - particularly important in a Pentium-paced environment where functional logic design is no longer separable from electrical and mechanical design." "Highlighting TTL, CMOS, and BiCMOS logic applications in a single source, Signal and Power Integrity in Digital Systems provides a practical solutions-oriented approach to a wide variety of relevant interconnection and timing issues." "Special features include noise tolerant logic architectures; power distribution techniques that reduce noise; clock distribution techniques that ensure clock signal quality; signal interconnection techniques that reduce crosstalk, signal loading, and transmission-line effects; how to get optimum performance from high-speed memory devices; and system application tips for high-speed PALs, PLAs, FIFOs, and ASICs." "Designers will also appreciate the practical engineering approximations provided for the calculation of design parameters along with illustrations and numerous tables usable for quick reference and comparison of characteristics." "It's a book every digital designer should have - engineers involved in the design of computers, peripherals, signal processors, and control and communications equipment, as well as young engineers facing their first designs using high-speed logic devices."--BOOK JACKET.Title Summary field provided by Blackwell North America, Inc. All Rights Reserved
Power Integrity for Electrical and Computer Engineers
Author: J. Ted Dibene, II
Publisher: John Wiley & Sons
ISBN: 1119263298
Category : Science
Languages : en
Pages : 557
Book Description
A professional guide to the fundamentals of power integrity analysis with an emphasis on silicon level power integrity Power Integrity for Electrical and Computer Engineers embraces the most recent changes in the field, offers a comprehensive introduction to the discipline of power integrity, and provides an overview of the fundamental principles. Written by noted experts on the topic, the book goes beyond most other resources to focus on the detailed aspects of silicon and optimization techniques in order to broaden the field of study. This important book offers coverage of a wide range of topics including signal analysis, EM concepts for PI, frequency domain analysis for PI, numerical methods (overview) for PI, and silicon device PI modeling. Power Integrity for Electrical and Computer Engineers examine platform technologies, system considerations, power conversion, system level modeling, and optimization methodologies. To reinforce the material presented, the authors include example problems. This important book: • Includes coverage on convergence, accuracy, and error analysis and explains how these can be used to analyze power integrity problems • Contains information for modeling the power converter from the PDN to the load in a full system level model • Explores areas of device level modeling of silicon as related to power integrity • Contains example word problems that are related to an individual chapter’s subject Written for electrical and computer engineers and academics, Power Integrity for Electrical and Computer Engineers is an authoritative guide to the fundamentals of power integrity and explores the topics of power integrity analysis, power integrity analytics, silicon level power integrity, and optimization techniques.
Publisher: John Wiley & Sons
ISBN: 1119263298
Category : Science
Languages : en
Pages : 557
Book Description
A professional guide to the fundamentals of power integrity analysis with an emphasis on silicon level power integrity Power Integrity for Electrical and Computer Engineers embraces the most recent changes in the field, offers a comprehensive introduction to the discipline of power integrity, and provides an overview of the fundamental principles. Written by noted experts on the topic, the book goes beyond most other resources to focus on the detailed aspects of silicon and optimization techniques in order to broaden the field of study. This important book offers coverage of a wide range of topics including signal analysis, EM concepts for PI, frequency domain analysis for PI, numerical methods (overview) for PI, and silicon device PI modeling. Power Integrity for Electrical and Computer Engineers examine platform technologies, system considerations, power conversion, system level modeling, and optimization methodologies. To reinforce the material presented, the authors include example problems. This important book: • Includes coverage on convergence, accuracy, and error analysis and explains how these can be used to analyze power integrity problems • Contains information for modeling the power converter from the PDN to the load in a full system level model • Explores areas of device level modeling of silicon as related to power integrity • Contains example word problems that are related to an individual chapter’s subject Written for electrical and computer engineers and academics, Power Integrity for Electrical and Computer Engineers is an authoritative guide to the fundamentals of power integrity and explores the topics of power integrity analysis, power integrity analytics, silicon level power integrity, and optimization techniques.
Signal and Power Integrity--simplified
Author: Eric Bogatin
Publisher: Pearson Education
ISBN: 0132349795
Category : Technology & Engineering
Languages : en
Pages : 793
Book Description
With the inclusion of the two new hot topics in signal integrity, power integrity and high speed serial links, this book will be the most up to date complete guide to understanding and designing for signal integrity.
Publisher: Pearson Education
ISBN: 0132349795
Category : Technology & Engineering
Languages : en
Pages : 793
Book Description
With the inclusion of the two new hot topics in signal integrity, power integrity and high speed serial links, this book will be the most up to date complete guide to understanding and designing for signal integrity.
High-Speed Signaling
Author: Kyung Suk (Dan) Oh
Publisher: Prentice Hall
ISBN: 0132827115
Category : Technology & Engineering
Languages : en
Pages : 608
Book Description
New System-Level Techniques for Optimizing Signal/Power Integrity in High-Speed Interfaces--from Pioneering Innovators at Rambus, Stanford, Berkeley, and MIT As data communication rates accelerate well into the multi-gigahertz range, ensuring signal integrity both on- and off-chip has become crucial. Signal integrity can no longer be addressed solely through improvements in package or board-level design: Diverse engineering teams must work together closely from the earliest design stages to identify the best system-level solutions. In High-Speed Signaling, several of the field’s most respected practitioners and researchers introduce cutting-edge modeling, simulation, and optimization techniques for meeting this challenge. Edited by pioneering experts Drs. Dan Oh and Chuck Yuan, these contributors explain why noise and jitter are no longer separable, demonstrate how to model their increasingly complex interactions, and thoroughly introduce a new simulation methodology for predicting link-level performance with unprecedented accuracy. The authors address signal integrity from architecture through high-volume production, thoroughly discussing design, implementation, and verification. Coverage includes New advances in passive-channel modeling, power-supply noise and jitter modeling, and system margin prediction Methodologies for balancing system voltage and timing budgets to improve system robustness in high-volume manufacturing Practical, stable formulae for converting key network parameters Improved solutions for difficult problems in the broadband modeling of interconnects Equalization techniques for optimizing channel performance Important new insights into the relationships between jitter and clocking topologies New on-chip measurement techniques for in-situ link performance testing Trends and future directions in signal integrity engineering High-Speed Signaling thoroughly introduces new techniques pioneered at Rambus and other leading high-tech companies and universities: approaches that have never before been presented with this much practical detail. It will be invaluable to everyone concerned with signal integrity, including signal and power integrity engineers, high-speed I/O circuit designers, and system-level board design engineers.
Publisher: Prentice Hall
ISBN: 0132827115
Category : Technology & Engineering
Languages : en
Pages : 608
Book Description
New System-Level Techniques for Optimizing Signal/Power Integrity in High-Speed Interfaces--from Pioneering Innovators at Rambus, Stanford, Berkeley, and MIT As data communication rates accelerate well into the multi-gigahertz range, ensuring signal integrity both on- and off-chip has become crucial. Signal integrity can no longer be addressed solely through improvements in package or board-level design: Diverse engineering teams must work together closely from the earliest design stages to identify the best system-level solutions. In High-Speed Signaling, several of the field’s most respected practitioners and researchers introduce cutting-edge modeling, simulation, and optimization techniques for meeting this challenge. Edited by pioneering experts Drs. Dan Oh and Chuck Yuan, these contributors explain why noise and jitter are no longer separable, demonstrate how to model their increasingly complex interactions, and thoroughly introduce a new simulation methodology for predicting link-level performance with unprecedented accuracy. The authors address signal integrity from architecture through high-volume production, thoroughly discussing design, implementation, and verification. Coverage includes New advances in passive-channel modeling, power-supply noise and jitter modeling, and system margin prediction Methodologies for balancing system voltage and timing budgets to improve system robustness in high-volume manufacturing Practical, stable formulae for converting key network parameters Improved solutions for difficult problems in the broadband modeling of interconnects Equalization techniques for optimizing channel performance Important new insights into the relationships between jitter and clocking topologies New on-chip measurement techniques for in-situ link performance testing Trends and future directions in signal integrity engineering High-Speed Signaling thoroughly introduces new techniques pioneered at Rambus and other leading high-tech companies and universities: approaches that have never before been presented with this much practical detail. It will be invaluable to everyone concerned with signal integrity, including signal and power integrity engineers, high-speed I/O circuit designers, and system-level board design engineers.
Chips 2020
Author: Bernd Hoefflinger
Publisher: Springer Science & Business Media
ISBN: 3642223990
Category : Science
Languages : en
Pages : 497
Book Description
The chips in present-day cell phones already contain billions of sub-100-nanometer transistors. By 2020, however, we will see systems-on-chips with trillions of 10-nanometer transistors. But this will be the end of the miniaturization, because yet smaller transistors, containing just a few control atoms, are subject to statistical fluctuations and thus no longer useful. We also need to worry about a potential energy crisis, because in less than five years from now, with current chip technology, the internet alone would consume the total global electrical power! This book presents a new, sustainable roadmap towards ultra-low-energy (femto-Joule), high-performance electronics. The focus is on the energy-efficiency of the various chip functions: sensing, processing, and communication, in a top-down spirit involving new architectures such as silicon brains, ultra-low-voltage circuits, energy harvesting, and 3D silicon technologies. Recognized world leaders from industry and from the research community share their views of this nanoelectronics future. They discuss, among other things, ubiquitous communication based on mobile companions, health and care supported by autonomous implants and by personal carebots, safe and efficient mobility assisted by co-pilots equipped with intelligent micro-electromechanical systems, and internet-based education for a billion people from kindergarden to retirement. This book should help and interest all those who will have to make decisions associated with future electronics: students, graduates, educators, and researchers, as well as managers, investors, and policy makers. Introduction: Towards Sustainable 2020 Nanoelectronics.- From Microelectronics to Nanoelectronics.- The Future of Eight Chip Technologies.- Analog–Digital Interfaces.- Interconnects and Transceivers.- Requirements and Markets for Nanoelectronics.- ITRS: The International Technology Roadmap for Semiconductors.- Nanolithography.- Power-Efficient Design Challenges.- Superprocessors and Supercomputers.- Towards Terabit Memories.- 3D Integration for Wireless Multimedia.- The Next-Generation Mobile User-Experience.- MEMS (Micro-Electro-Mechanical Systems) for Automotive and Consumer.- Vision Sensors and Cameras.- Digital Neural Networks for New Media.- Retinal Implants for Blind Patients.- Silicon Brains.- Energy Harvesting and Chip Autonomy.- The Energy Crisis.- The Extreme-Technology Industry.- Education and Research for the Age of Nanoelectronics.- 2020 World with Chips.
Publisher: Springer Science & Business Media
ISBN: 3642223990
Category : Science
Languages : en
Pages : 497
Book Description
The chips in present-day cell phones already contain billions of sub-100-nanometer transistors. By 2020, however, we will see systems-on-chips with trillions of 10-nanometer transistors. But this will be the end of the miniaturization, because yet smaller transistors, containing just a few control atoms, are subject to statistical fluctuations and thus no longer useful. We also need to worry about a potential energy crisis, because in less than five years from now, with current chip technology, the internet alone would consume the total global electrical power! This book presents a new, sustainable roadmap towards ultra-low-energy (femto-Joule), high-performance electronics. The focus is on the energy-efficiency of the various chip functions: sensing, processing, and communication, in a top-down spirit involving new architectures such as silicon brains, ultra-low-voltage circuits, energy harvesting, and 3D silicon technologies. Recognized world leaders from industry and from the research community share their views of this nanoelectronics future. They discuss, among other things, ubiquitous communication based on mobile companions, health and care supported by autonomous implants and by personal carebots, safe and efficient mobility assisted by co-pilots equipped with intelligent micro-electromechanical systems, and internet-based education for a billion people from kindergarden to retirement. This book should help and interest all those who will have to make decisions associated with future electronics: students, graduates, educators, and researchers, as well as managers, investors, and policy makers. Introduction: Towards Sustainable 2020 Nanoelectronics.- From Microelectronics to Nanoelectronics.- The Future of Eight Chip Technologies.- Analog–Digital Interfaces.- Interconnects and Transceivers.- Requirements and Markets for Nanoelectronics.- ITRS: The International Technology Roadmap for Semiconductors.- Nanolithography.- Power-Efficient Design Challenges.- Superprocessors and Supercomputers.- Towards Terabit Memories.- 3D Integration for Wireless Multimedia.- The Next-Generation Mobile User-Experience.- MEMS (Micro-Electro-Mechanical Systems) for Automotive and Consumer.- Vision Sensors and Cameras.- Digital Neural Networks for New Media.- Retinal Implants for Blind Patients.- Silicon Brains.- Energy Harvesting and Chip Autonomy.- The Energy Crisis.- The Extreme-Technology Industry.- Education and Research for the Age of Nanoelectronics.- 2020 World with Chips.