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Author: Raghuram Srinivasa Tupuri
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 238
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Book Description
Author: Raghuram Srinivasa Tupuri
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 238
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Book Description
Author: Heinrich Theodor Vierhaus
Publisher:
ISBN:
Category :
Languages : de
Pages : 19
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Book Description
Author: Taavi Viilukas
Publisher:
ISBN: 9789949233847
Category :
Languages : en
Pages : 150
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Book Description
Author: Debashis Bhattacharya
Publisher: Springer Science & Business Media
ISBN: 1461315271
Category : Computers
Languages : en
Pages : 168
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Book Description
Test generation is one of the most difficult tasks facing the designer of complex VLSI-based digital systems. Much of this difficulty is attributable to the almost universal use in testing of low, gate-level circuit and fault models that predate integrated circuit technology. It is long been recognized that the testing prob lem can be alleviated by the use of higher-level methods in which multigate modules or cells are the primitive components in test generation; however, the development of such methods has proceeded very slowly. To be acceptable, high-level approaches should be applicable to most types of digital circuits, and should provide fault coverage comparable to that of traditional, low-level methods. The fault coverage problem has, perhaps, been the most intractable, due to continued reliance in the testing industry on the single stuck-line (SSL) fault model, which is tightly bound to the gate level of abstraction. This monograph presents a novel approach to solving the foregoing problem. It is based on the systematic use of multibit vectors rather than single bits to represent logic signals, including fault signals. A circuit is viewed as a collection of high-level components such as adders, multiplexers, and registers, interconnected by n-bit buses. To match this high-level circuit model, we introduce a high-level bus fault that, in effect, replaces a large number of SSL faults and allows them to be tested in parallel. However, by reducing the bus size from n to one, we can obtain the traditional gate-level circuit and models.
Author: Chun-Hung Chen
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 188
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Book Description
Author: Anna Rannaste
Publisher:
ISBN: 9789949230419
Category :
Languages : en
Pages : 127
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Book Description
Author: Université de Montréal. Département d'Informatique et de Recherche Opérationnelle
Publisher:
ISBN:
Category :
Languages : en
Pages :
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Book Description
Author: Vojin G. Oklobdzija
Publisher: CRC Press
ISBN: 9780849308857
Category : Computers
Languages : en
Pages : 1422
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Book Description
There is arguably no field in greater need of a comprehensive handbook than computer engineering. The unparalleled rate of technological advancement, the explosion of computer applications, and the now-in-progress migration to a wireless world have made it difficult for engineers to keep up with all the developments in specialties outside their own. References published only a few years ago are now sorely out of date. The Computer Engineering Handbook changes all of that. Under the leadership of Vojin Oklobdzija and a stellar editorial board, some of the industry's foremost experts have joined forces to create what promises to be the definitive resource for computer design and engineering. Instead of focusing on basic, introductory material, it forms a comprehensive, state-of-the-art review of the field's most recent achievements, outstanding issues, and future directions. The world of computer engineering is vast and evolving so rapidly that what is cutting-edge today may be obsolete in a few months. While exploring the new developments, trends, and future directions of the field, The Computer Engineering Handbook captures what is fundamental and of lasting value.
Author: Marian Adamski
Publisher: Springer Science & Business Media
ISBN: 3642175457
Category : Technology & Engineering
Languages : en
Pages : 372
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Book Description
Logic design of digital devices is a very important part of the Computer Science. It deals with design and testing of logic circuits for both data-path and control unit of a digital system. Design methods depend strongly on logic elements using for implementation of logic circuits. Different programmable logic devices are wide used for implementation of logic circuits. Nowadays, we witness the rapid growth of new and new chips, but there is a strong lack of new design methods. This book includes a variety of design and test methods targeted on different digital devices. It covers methods of digital system design, the development of theoretical base for construction and designing of the PLD–based devices, application of UML for digital design. A considerable part of the book is devoted to design methods oriented on implementing control units using FPGA and CPLD chips. Such important issues as design of reliable FSMs, automatic design of concurrent logic controllers, the models and methods for creating infrastructure IP services for the SoCs are also presented. The editors of the book hope that it will be interesting and useful for experts in Computer Science and Electronics, as well as for students, who are viewed as designers of future digital devices and systems.
Author: Rajen Sham Ramchandani
Publisher:
ISBN:
Category : Digital electronics
Languages : en
Pages : 174
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Book Description
Abstract: "The goal of this thesis is to exploit the design hierarchy to solve the problem of test vector generation for sequential circuits. The fault model used for sequential test vector generation is the single stuck-at fault model. This thesis describes a bottom-up hierarchical test vector generation technique to generate test vectors using the behavioral description of the circuit function. This work uses the linking information generated by the high-level synthesis tool which allows traversal of the design hierarchy between the behavioral level, the RTL and the gate-level. Gate-level test vectors for individual modules are sensitized and propagated at the behavioral-level. The fault sensitization and the fault propagation techniques are developed from software testing techniques and generate a system of equations. This system of equations is transformed into a Mixed Integer Non-Linear Programming problem and solved to obtain the test vectors. The technique has been implemented and results from this approach show an order of magnitude speed up in test generation compared to existing gate-level sequential test generation tools."
