Author: Carl Burton EricksonPublisher:
ISBN:
Category : Multiprocessors
Languages : en
Pages : 340
Book Description
Design and Evaluation of a Hierarchical Bus Multiprocessor
Author: Carl Burton EricksonPublisher:
ISBN:
Category : Multiprocessors
Languages : en
Pages : 340
Book Description
Evaluating Design Choices for Shared Bus Multiprocessors in a Throughput-oriented Environment
Author: University of Wisconsin--Madison. Computer Sciences DeptPublisher:
ISBN:
Category : Cache memory
Languages : en
Pages : 36
Book Description
Abstract: "This paper considers the evaluation of design choices in multiprocessors with a single, shared bus interconnect operating in a throughput-oriented, multiprogrammed environment. That is, an environment in which each task is being executed on a single processor and the performance of the multiprocessor is measured by its overall throughput. To evaluate design choices, we develop mean value analysis analytical models and validate our models by comparing their results against the results of a trace-driven simulation analysis for over 5000 multiprocessor configurations. The trace-driven simulation uses actual programs and simulates their execution in a throughput-oriented environment.
Design and Performance Analysis of a Hierarchical Multiprocessor Computer Architecture for Multi-sensor Based Robots
Author: Çaḡlan M. ArasPublisher:
ISBN:
Category :
Languages : en
Pages : 236
Book Description
Performance Analysis of a Hierarchical, Cache-coherent, Shared Memory Based, Multi-processor System
Author: Raman NayyarPublisher:
ISBN:
Category : Computer architecture
Languages : en
Pages : 282
Book Description
The Design and Evaluation of a Common Bus Memory Access Processor
Author: Gerald M. KaramPublisher:
ISBN:
Category : Magnetic memory (Computers)
Languages : en
Pages : 202
Book Description
Memory System Design for Bus Based Multiprocessors
Author: Men-Chow ChiangPublisher:
ISBN:
Category : Multiprocessors
Languages : en
Pages : 480
Book Description
An Evaluation of a Multiprocessor System on a Time-shared Bus
Author: Doo Yong KimPublisher:
ISBN:
Category : Computer simulation
Languages : en
Pages : 326
Book Description
Proceedings of the 2012 International Conference on Information Technology and Software Engineering
Author: Wei LuPublisher: Springer Science & Business Media
ISBN: 364234528X
Category : Computers
Languages : en
Pages : 942
Book Description
Proceedings of the 2012 International Conference on Information Technology and Software Engineering presents selected articles from this major event, which was held in Beijing, December 8-10, 2012. This book presents the latest research trends, methods and experimental results in the fields of information technology and software engineering, covering various state-of-the-art research theories and approaches. The subjects range from intelligent computing to information processing, software engineering, Web, unified modeling language (UML), multimedia, communication technologies, system identification, graphics and visualizing, etc. The proceedings provide a major interdisciplinary forum for researchers and engineers to present the most innovative studies and advances, which can serve as an excellent reference work for researchers and graduate students working on information technology and software engineering. Prof. Wei Lu, Dr. Guoqiang Cai, Prof. Weibin Liu and Dr. Weiwei Xing all work at Beijing Jiaotong University.
Design and Performance Evaluation of a Multi-computer System for Timesharing Environments
Author: Michael J. K. NielsenPublisher:
ISBN:
Category :
Languages : en
Pages : 140
Book Description
Performance Evaluation of Wire-limited Hierarchical Networks
Author: William Tsun-Yuk HsuPublisher:
ISBN:
Category : Computer networks
Languages : en
Pages : 35
Book Description
Abstract: "Advanced packaging technology demands a new approach to system design. In the study of multiprocessor networks, attention must be paid to the effects of packaging constraints on cost and performance, as well as the physical hierarchy imposed by packaging. We examine a simple bus-based approach to clustering, and analyze its effects on k-ary n-cubes such as meshes and hypercubes. We also study a generalized shuffle- exchange network, based on graphs with optimal diameter for a given degree, and hence attractive from the standpoint of pinout constraints. Relative performance is heavily dependent on the cost constraint used, the system configuration and message granularity. The choice of a multiprocessor interconnect must take into consideration all these factors."
