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Author: Jose M. de la Rosa
Publisher: John Wiley & Sons
ISBN: 1118568435
Category : Technology & Engineering
Languages : en
Pages : 463
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Book Description
A comprehensive overview of Sigma-Delta Analog-to-Digital Converters (ADCs) and a practical guide to their design in nano-scale CMOS for optimal performance. This book presents a systematic and comprehensive compilation of sigma-delta converter operating principles, the new advances in architectures and circuits, design methodologies and practical considerations − going from system-level specifications to silicon integration, packaging and measurements, with emphasis on nanometer CMOS implementation. The book emphasizes practical design issues – from high-level behavioural modelling in MATLAB/SIMULINK, to circuit-level implementation in Cadence Design FrameWork II. As well as being a comprehensive reference to the theory, the book is also unique in that it gives special importance on practical issues, giving a detailed description of the different steps that constitute the whole design flow of sigma-delta ADCs. The book begins with an introductory survey of sigma-delta modulators, their fundamentals architectures and synthesis methods covered in Chapter 1. In Chapter 2, the effect of main circuit error mechanisms is analysed, providing the necessary understanding of the main practical issues affecting the performance of sigma-delta modulators. The knowledge derived from the first two chapters is presented in the book as an essential part of the systematic top-down/bottom-up synthesis methodology of sigma-delta modulators described in Chapter 3, where a time-domain behavioural simulator named SIMSIDES is described and applied to the high-level design and verification of sigma-delta ADCs. Chapter 4 moves farther down from system-level to the circuit and physical level, providing a number of design recommendations and practical recipes to complete the design flow of sigma-delta modulators. To conclude the book, Chapter 5 gives an overview of the state-of-the-art sigma-delta ADCs, which are exhaustively analysed in order to extract practical design guidelines and to identify the incoming trends, design challenges as well as practical solutions proposed by cutting-edge designs. Offers a complete survey of sigma-delta modulator architectures from fundamentals to state-of-the art topologies, considering both switched-capacitor and continuous-time circuit implementations Gives a systematic analysis and practical design guide of sigma-delta modulators, from a top-down/bottom-up perspective, including mathematical models and analytical procedures, behavioural modeling in MATLAB/SIMULINK, macromodeling, and circuit-level implementation in Cadence Design FrameWork II, chip prototyping, and experimental characterization. Systematic compilation of cutting-edge sigma-delta modulators Complete description of SIMSIDES, a time-domain behavioural simulator implemented in MATLAB/SIMULINK Plenty of examples, case studies, and simulation test benches, covering the different stages of the design flow of sigma-delta modulators A number of electronic resources, including SIMSIDES, the statistical data used in the state-of-the-art survey, as well as many design examples and test benches are hosted on a companion website Essential reading for Researchers and electronics engineering practitioners interested in the design of high-performance data converters integrated in nanometer CMOS technologies; mixed-signal designers.
Author: Jose M. de la Rosa
Publisher: John Wiley & Sons
ISBN: 1118568435
Category : Technology & Engineering
Languages : en
Pages : 463
Get Book Here
Book Description
A comprehensive overview of Sigma-Delta Analog-to-Digital Converters (ADCs) and a practical guide to their design in nano-scale CMOS for optimal performance. This book presents a systematic and comprehensive compilation of sigma-delta converter operating principles, the new advances in architectures and circuits, design methodologies and practical considerations − going from system-level specifications to silicon integration, packaging and measurements, with emphasis on nanometer CMOS implementation. The book emphasizes practical design issues – from high-level behavioural modelling in MATLAB/SIMULINK, to circuit-level implementation in Cadence Design FrameWork II. As well as being a comprehensive reference to the theory, the book is also unique in that it gives special importance on practical issues, giving a detailed description of the different steps that constitute the whole design flow of sigma-delta ADCs. The book begins with an introductory survey of sigma-delta modulators, their fundamentals architectures and synthesis methods covered in Chapter 1. In Chapter 2, the effect of main circuit error mechanisms is analysed, providing the necessary understanding of the main practical issues affecting the performance of sigma-delta modulators. The knowledge derived from the first two chapters is presented in the book as an essential part of the systematic top-down/bottom-up synthesis methodology of sigma-delta modulators described in Chapter 3, where a time-domain behavioural simulator named SIMSIDES is described and applied to the high-level design and verification of sigma-delta ADCs. Chapter 4 moves farther down from system-level to the circuit and physical level, providing a number of design recommendations and practical recipes to complete the design flow of sigma-delta modulators. To conclude the book, Chapter 5 gives an overview of the state-of-the-art sigma-delta ADCs, which are exhaustively analysed in order to extract practical design guidelines and to identify the incoming trends, design challenges as well as practical solutions proposed by cutting-edge designs. Offers a complete survey of sigma-delta modulator architectures from fundamentals to state-of-the art topologies, considering both switched-capacitor and continuous-time circuit implementations Gives a systematic analysis and practical design guide of sigma-delta modulators, from a top-down/bottom-up perspective, including mathematical models and analytical procedures, behavioural modeling in MATLAB/SIMULINK, macromodeling, and circuit-level implementation in Cadence Design FrameWork II, chip prototyping, and experimental characterization. Systematic compilation of cutting-edge sigma-delta modulators Complete description of SIMSIDES, a time-domain behavioural simulator implemented in MATLAB/SIMULINK Plenty of examples, case studies, and simulation test benches, covering the different stages of the design flow of sigma-delta modulators A number of electronic resources, including SIMSIDES, the statistical data used in the state-of-the-art survey, as well as many design examples and test benches are hosted on a companion website Essential reading for Researchers and electronics engineering practitioners interested in the design of high-performance data converters integrated in nanometer CMOS technologies; mixed-signal designers.
Author: Jose M. de la Rosa
Publisher: John Wiley & Sons
ISBN: 1119275784
Category : Technology & Engineering
Languages : en
Pages : 581
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Book Description
Thoroughly revised and expanded to help readers systematically increase their knowledge and insight about Sigma-Delta Modulators Sigma-Delta Modulators (SDMs) have become one of the best choices for the implementation of analog/digital interfaces of electronic systems integrated in CMOS technologies. Compared to other kinds of Analog-to-Digital Converters (ADCs), Σ∆Ms cover one of the widest conversion regions of the resolution-versus-bandwidth plane, being the most efficient solution to digitize signals in an increasingly number of applications, which span from high-resolution low-bandwidth digital audio, sensor interfaces, and instrumentation, to ultra-low power biomedical systems and medium-resolution broadband wireless communications. Following the spirit of its first edition, Sigma-Delta Converters: Practical Design Guide, 2nd Edition takes a comprehensive look at SDMs, their diverse types of architectures, circuit techniques, analysis synthesis methods, and CAD tools, as well as their practical design considerations. It compiles and updates the current research reported on the topic, and explains the multiple trade-offs involved in the whole design flow of Sigma-Delta Modulators—from specifications to chip implementation and characterization. The book follows a top-down approach in order to provide readers with the necessary understanding about recent advances, trends, and challenges in state-of-the-art Σ∆Ms. It makes more emphasis on two key points, which were not treated so deeply in the first edition: It includes a more detailed explanation of Σ∆Ms implemented using Continuous-Time (CT) circuits, going from system-level synthesis to practical circuit limitations. It provides more practical case studies and applications, as well as a deeper description of the synthesis methodologies and CAD tools employed in the design of Σ∆ converters. Sigma-Delta Converters: Practical Design Guide, 2nd Edition serves as an excellent textbook for undergraduate and graduate students in electrical engineering as well as design engineers working on SD data-converters, who are looking for a uniform and self-contained reference in this hot topic. With this goal in mind, and based on the feedback received from readers, the contents have been revised and structured to make this new edition a unique monograph written in a didactical, pedagogical, and intuitive style.
Author: Shahriar Rabii
Publisher: Springer
ISBN: 0792383613
Category : Technology & Engineering
Languages : en
Pages : 187
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Book Description
Oversampling techniques based on sigma-delta modulation are widely used to implement the analog/digital interfaces in CMOS VLSI technologies. This approach is relatively insensitive to imperfections in the manufacturing process and offers numerous advantages for the realization of high-resolution analog-to-digital (A/D) converters in the low-voltage environment that is increasingly demanded by advanced VLSI technologies and by portable electronic systems. In The Design of Low-Voltage, Low-Power Sigma-Delta Modulators, an analysis of power dissipation in sigma-delta modulators is presented, and a low-voltage implementation of a digital-audio performance A/D converter based on the results of this analysis is described. Although significant power savings can typically be achieved in digital circuits by reducing the power supply voltage, the power dissipation in analog circuits actually tends to increase with decreasing supply voltages. Oversampling architectures are a potentially power-efficient means of implementing high-resolution A/D converters because they reduce the number and complexity of the analog circuits in comparison with Nyquist-rate converters. In fact, it is shown that the power dissipation of a sigma-delta modulator can approach that of a single integrator with the resolution and bandwidth required for a given application. In this research the influence of various parameters on the power dissipation of the modulator has been evaluated and strategies for the design of a power-efficient implementation have been identified. The Design of Low-Voltage, Low-Power Sigma-Delta Modulators begins with an overview of A/D conversion, emphasizing sigma-delta modulators. It includes a detailed analysis of noise in sigma-delta modulators, analyzes power dissipation in integrator circuits, and addresses practical issues in the circuit design and testing of a high-resolution modulator. The Design of Low-Voltage, Low-Power Sigma-Delta Modulators will be of interest to practicing engineers and researchers in the areas of mixed-signal and analog integrated circuit design.
Author: Chadi Jabbour
Publisher:
ISBN:
Category :
Languages : en
Pages : 189
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Book Description
Nowadays, communication devices are supporting an increasing number of standards. The diversity of the requirements in terms of speed and resolution, makes the design of a single low power analog to digital converter (ADC) suitable for all the scenarios very problematic. Reconfigurable ADCs are a solution to this problem, where resolution would be exchanged for bandwidth. Classical Delta Sigma ADCs offer an easy way to perform this exchange by adjusting their oversampling ratios. However, they are not suitable for wideband applications. Parallelizing Delta Sigma ADCs overcomes this problem and in addition, increases the reconfigurability of the ADC. In this work, a fully reconfigurable Time-interleaved Delta Sigma ADC is proposed. Its reconfigurability permits it to perform resolution-bandwidth trade-off as well as power consumptionbandwidth trade-off by adjusting the operation frequency, the number of active channels, the oversampling ratio and the modulator order. A novel interpolation technique is also proposed. It allows to downscale the capacitor sizes that may otherwise reach unreasonable values if large resolutions are required and relaxes the constraints on the anti-alias filter as well. A prototype of the presented Time-interleaved Delta Sigma ADC has been realized in a 1.2 V 65 nm CMOS technology. It was designed to fulfill the requirements of GSM, EDGE, UMTS, DVBT, WiFi and WiMax standards. For the GSM/EDGE scenario, a 80 dB SNR was measured. For the rest of scenarios, the performances were not secured but the functionality was tested successfully.
Author: Hussein Fakhoury
Publisher:
ISBN:
Category :
Languages : en
Pages : 0
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Book Description
The market of A/D converters can be segmented in two categories. From one side we distinguish the Intellectual Property (IP) blocks that are generally optimized for a specific application. On the other side, the general-purpose discrete Integrated Circuits (ICs) that are designed such as they could be used in different applications. This thesis work deals with the second category. It is part of a research and development program initiated in 2010 in the European project FP7 SACRA, whose purpose was to study the feasibility of a delta-sigma (DS) analog-to-digital converter that could compete with the pipeline architecture for applications that require high bandwidth (≥10MHz) and high resolution (>10-bit) such as medical imaging, wireless and wireline communications, video or instrumentation. Currently, the pipeline is still largely predominant for such applications and the few commercial wideband solutions based on a DS architecture have a signal bandwidth limited to 10 MHz or 25 MHz while consuming respectively 100mW and 20mW for an ENOB around 12-bit. This manuscript summarizes the design, fabrication and measurement of a low-pass CT DS modulator with a signal bandwidth of 40MHz, while targeting an effective resolution of 12-bit and a power consumption of less than 100mW.
Author: Hyunsik Park
Publisher:
ISBN:
Category :
Languages : en
Pages : 153
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Book Description
Author: Anas A. Hamoui
Publisher:
ISBN: 9780612943124
Category :
Languages : en
Pages : 318
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Book Description
Accordingly, to meet the stringent ADC specifications imposed by emerging broadband communication applications, this thesis explores the following: (1) High-Speed High-Resolution Delta-Sigma (DeltaSigma) ADCs: Oversampling DeltaSigma ADCs can achieve a high-resolution data conversion in low-speed applications using low-accuracy analog components. However, extending these ADCs to high-speed applications requires lowering the oversampling ratio (OSR), due to both power and CMOS technology limitations. Unfortunately, this significantly limits the efficiency of a DeltaSigma ADC in achieving a high-resolution analog/digital (A/D) conversion. Therefore, this thesis presents several techniques to enable the OSR lowering in high-speed DeltaSigma ADCs without compromising the resolution. Specifically, a low-distortion single-stage architecture is proposed for high-order multibit DeltaSigma modulators. Furthermore, a dynamic-element-matching (DEM) technique, called Pseudo Data-Weighted-Averaging (Pseudo DWA), with reduced tone behavior at a low OSR is proposed for the linearization of the digital-to-analog converter (DAC) in a multibit DeltaSigma modulator. (2) Low-Voltage Switched-Capacitor (SC) Circuit Implementation: To demonstrate the practicality of the proposed modulator architecture and DAC-linearization technique when the OSR and the supply voltage are limited by the technology, a DeltaSigma modulator prototype is designed using SC circuit techniques and fabricated in a 0.18-mum standard digital CMOS process. When operated from a 1.8-V supply, it achieves a 13-bit spurious-free dynamic range (SFDR) and a 12-bit signal-to-noise ratio (SNR) over a 3-MS/s conversion bandwidth with a 1.85-V pp input-signal range. The analog and digital power consumptions are, respectively, 32.4 mW and 12.6 mW. The on-chip references dissipate 14.4 mW. Accordingly, this DeltaSigma modulator was one of the few early-reported CMOS DeltaSigma modulators targeting high-speed (& ge;2 MS/s) high-resolution (& ge;12 bits) applications and operating from a low supply voltage (& le;1.8 V). Furthermore, its measured performance compared favourably to the previously-reported state-of-the-art DeltaSigma modulators. Ironically, the significance of analog integrated-circuit design is growing more prominent in today's "digital" communication age due, in part, to data converters. Specifically, the proliferation of broadband digital communication applications is stimulating the evolving research towards the development of analog-to-digital converters (ADCs) with higher speeds and higher resolutions. These ADCs must be implemented in standard digital CMOS processes for higher system integration and lower fabrication costs. However, in nano-scale CMOS technologies, the decreasing supply voltages and the shrinking devices with poor analog-processing capabilities complicate the low-power design of high-resolution analog circuits.
