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Author: Kangmin Hu
Publisher:
ISBN:
Category : Oscillators, Electric
Languages : en
Pages : 86
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Book Description
High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most of their reported power efficiency improves much slower than the rise of data rate. Therefore, aggregate I/O power is increasing and will exceed the power budget if the trend for more off-chip bandwidth is sustained. In this work, a system level statistical analysis of serial links is first described, and compares the link performance of Non-Return-to-Zero (2-PAM) with higher-order modulation (duobinary) signaling schemes. This method enables fast and accurate BER distribution simulation of serial link transceivers that include channel and circuit imperfections, such as finite pulse rise/fall time, duty cycle variation, and both receiver and transmitter forwarded-clock jitter. Second, in order to address link power efficiency, two test chips have been implemented. The first one describes a quad-lane, 6.4-7.2 Gb/s serial link receiver prototype using a forwarded clock architecture. A novel phase deskew scheme using injection-locked ring oscillators (ILRO) is proposed that achieves greater than one UI of phase shift for multiple clock phases, eliminating phase rotation and interpolation required in conventional architectures. Each receiver, optimized for power efficiency, consists of a low-power linear equalizer, four offset-cancelled quantizers for 1:4 demultiplexing, and an injection-locked ring oscillator coupled to a low-voltage swing, global clock distribution. Measurement results show a 6.4-7.2Gb/s data rate with BER
Author: Kangmin Hu
Publisher:
ISBN:
Category : Oscillators, Electric
Languages : en
Pages : 86
Get Book Here
Book Description
High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most of their reported power efficiency improves much slower than the rise of data rate. Therefore, aggregate I/O power is increasing and will exceed the power budget if the trend for more off-chip bandwidth is sustained. In this work, a system level statistical analysis of serial links is first described, and compares the link performance of Non-Return-to-Zero (2-PAM) with higher-order modulation (duobinary) signaling schemes. This method enables fast and accurate BER distribution simulation of serial link transceivers that include channel and circuit imperfections, such as finite pulse rise/fall time, duty cycle variation, and both receiver and transmitter forwarded-clock jitter. Second, in order to address link power efficiency, two test chips have been implemented. The first one describes a quad-lane, 6.4-7.2 Gb/s serial link receiver prototype using a forwarded clock architecture. A novel phase deskew scheme using injection-locked ring oscillators (ILRO) is proposed that achieves greater than one UI of phase shift for multiple clock phases, eliminating phase rotation and interpolation required in conventional architectures. Each receiver, optimized for power efficiency, consists of a low-power linear equalizer, four offset-cancelled quantizers for 1:4 demultiplexing, and an injection-locked ring oscillator coupled to a low-voltage swing, global clock distribution. Measurement results show a 6.4-7.2Gb/s data rate with BER
Author: Eduard Säckinger
Publisher: John Wiley & Sons
ISBN: 1119264413
Category : Technology & Engineering
Languages : en
Pages : 653
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Book Description
An up-to-date, comprehensive guide for advanced electrical engineering studentsand electrical engineers working in the IC and optical industries This book covers the major transimpedance amplifier (TIA) topologies and their circuit implementations for optical receivers. This includes the shunt-feedback TIA, common-base TIA, common-gate TIA, regulated-cascode TIA, distributed-amplifier TIA, nonresistive feedback TIA, current-mode TIA, burst-mode TIA, and analog-receiver TIA. The noise, transimpedance, and other performance parameters of these circuits are analyzed and optimized. Topics of interest include post amplifiers, differential vs. single-ended TIAs, DC input current control, and adaptive transimpedance. The book features real-world examples of TIA circuits for a variety of receivers (direct detection, coherent, burst-mode, etc.) implemented in a broad array of technologies (HBT, BiCMOS, CMOS, etc.). The book begins with an introduction to optical communication systems, signals, and standards. It then moves on to discussions of optical fiber and photodetectors. This discussion includes p-i-n photodetectors; avalanche photodetectors (APD); optically preamplified detectors; integrated detectors, including detectors for silicon photonics; and detectors for phase-modulated signals, including coherent detectors. This is followed by coverage of the optical receiver at the system level: the relationship between noise, sensitivity, optical signal-to-noise ratio (OSNR), and bit-error rate (BER) is explained; receiver impairments, such as intersymbol interference (ISI), are covered. In addition, the author presents TIA specifications and illustrates them with example values from recent product data sheets. The book also includes: Many numerical examples throughout that help make the material more concrete for readers Real-world product examples that show the performance of actual IC designs Chapter summaries that highlight the key points Problems and their solutions for readers who want to practice and deepen their understanding of the material Appendices that cover communication signals, eye diagrams, timing jitter, nonlinearity, adaptive equalizers, decision point control, forward error correction (FEC), and second-order low-pass transfer functions Analysis and Design of Transimpedance Amplifiers for Optical Receivers belongs on the reference shelves of every electrical engineer working in the IC and optical industries. It also can serve as a textbook for upper-level undergraduates and graduate students studying integrated circuit design and optical communication.
Author: Ramesh Harjani
Publisher: World Scientific
ISBN: 9814479020
Category : Technology & Engineering
Languages : en
Pages : 233
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Book Description
MOS technology has rapidly become the de facto standard for mixed-signal integrated circuit design due to the high levels of integration possible as device geometries shrink to nanometer scales. The reduction in feature size means that the number of transistor and clock speeds have increased significantly. In fact, current day microprocessors contain hundreds of millions of transistors operating at multiple gigahertz. Furthermore, this reduction in feature size also has a significant impact on mixed-signal circuits. Due to the higher levels of integration, the majority of ASICs possesses some analog components. It has now become nearly mandatory to integrate both analog and digital circuits on the same substrate due to cost and power constraints. This book presents some of the newer problems and opportunities offered by the small device geometries and the high levels of integration that is now possible.The aim of this book is to summarize some of the most critical aspects of high-speed analog/RF communications circuits. Attention is focused on the impact of scaling, substrate noise, data converters, RF and wireless communication circuits and wireline communication circuits, including high-speed I/O.
Author: Cecilia Gimeno Gasca
Publisher: Springer
ISBN: 3319105639
Category : Technology & Engineering
Languages : en
Pages : 164
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Book Description
This book introduces readers to the design of adaptive equalization solutions integrated in standard CMOS technology for high-speed serial links. Since continuous-time equalizers offer various advantages as an alternative to discrete-time equalizers at multi-gigabit rates, this book provides a detailed description of continuous-time adaptive equalizers design - both at transistor and system levels-, their main characteristics and performances. The authors begin with a complete review and analysis of the state of the art of equalizers for wireline applications, describing why they are necessary, their types, and their main applications. Next, theoretical fundamentals of continuous-time adaptive equalizers are explored. Then, new structures are proposed to implement the different building blocks of the adaptive equalizer: line equalizer, loop-filters, power comparator, etc. The authors demonstrate the design of a complete low-power, low-voltage, high-speed, continuous-time adaptive equalizer. Finally, a cost-effective CMOS receiver which includes the proposed continuous-time adaptive equalizer is designed for 1.25 Gb/s optical communications through 50-m length, 1-mm diameter plastic optical fiber (POF).
Author: Cecilia Gimeno Gasca
Publisher:
ISBN: 9783319105642
Category :
Languages : en
Pages : 172
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Book Description
Author: Krzysztof Iniewski
Publisher: CRC Press
ISBN: 1420070630
Category : Technology & Engineering
Languages : en
Pages : 602
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Book Description
Circuits for Emerging Technologies Beyond CMOS New exciting opportunities are abounding in the field of body area networks, wireless communications, data networking, and optical imaging. In response to these developments, top-notch international experts in industry and academia present Circuits at the Nanoscale: Communications, Imaging, and Sensing. This volume, unique in both its scope and its focus, addresses the state-of-the-art in integrated circuit design in the context of emerging systems. A must for anyone serious about circuit design for future technologies, this book discusses emerging materials that can take system performance beyond standard CMOS. These include Silicon on Insulator (SOI), Silicon Germanium (SiGe), and Indium Phosphide (InP). Three-dimensional CMOS integration and co-integration with Microelectromechanical (MEMS) technology and radiation sensors are described as well. Topics in the book are divided into comprehensive sections on emerging design techniques, mixed-signal CMOS circuits, circuits for communications, and circuits for imaging and sensing. Dr. Krzysztof Iniewski is a director at CMOS Emerging Technologies, Inc., a consulting company in Vancouver, British Columbia. His current research interests are in VLSI ciruits for medical applications. He has published over 100 research papers in international journals and conferences, and he holds 18 international patents granted in the United States, Canada, France, Germany, and Japan. In this volume, he has assembled the contributions of over 60 world-reknown experts who are at the top of their field in the world of circuit design, advancing the bank of knowledge for all who work in this exciting and burgeoning area.
Author: Vojin G. Oklobdzija
Publisher: Springer Science & Business Media
ISBN: 0387340475
Category : Technology & Engineering
Languages : en
Pages : 342
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Book Description
Written by the world’s most prominent microprocessor design leaders from industry and academia, this book provides complete coverage of all aspects of complex microprocessor design: technology, power management, clocking, high-performance architecture, design methodologies, memory and I/O design, computer aided design, testing and design for testability. The chapters provide state-of-the-art knowledge while including sufficient tutorial material to bring non-experts up to speed. A useful companion to design engineers working in related areas.
Author: Paul Muller
Publisher: Springer Science & Business Media
ISBN: 1402059116
Category : Computers
Languages : en
Pages : 207
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Book Description
In the world of optical data communications this book will be an absolute must-read. It focuses on optical communications for short and very short distance applications and discusses the monolithic integration of optical receivers with processing elements in standard CMOS technologies. What’s more, it provides the reader with the necessary background knowledge to fully understand the trade-offs in short-distance communication receiver design and presents the key issues to be addressed in the development of such receivers in CMOS technologies. Moreover, novel design approaches are presented.
Author: David James Rennie
Publisher:
ISBN:
Category :
Languages : en
Pages :
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Book Description
Author: S. F. Yu
Publisher: John Wiley & Sons
ISBN: 9780471391241
Category : Science
Languages : en
Pages : 486
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Book Description
A practical, hands-on guidebook for the efficient modeling of VCSELs Vertical Cavity Surface Emitting Lasers (VCSELs) are a unique type of semiconductor laser whose optical output is vertically emitted from the surface as opposed to conventional edge-emitting semiconductor lasers. Complex in design and expensive to produce, VCSELs nevertheless represent an already widely used laser technology that promises to have even more significant applications in the future. Although the research has accelerated, there have been relatively few books written on this important topic. Analysis and Design of Vertical Cavity Surface Emitting Lasers seeks to encapsulate this growing body of knowledge into a single, comprehensive reference that will be of equal value for both professionals and academics in the field. The author, a recognized expert in the field of VCSELs, attempts to clarify often conflicting assumptions in order to help readers achieve the simplest and most efficient VCSEL models for any given problem. Highlights of the text include: * A clear and comprehensive theoretical treatment of VCSELs * Detailed derivations for understanding the operational principles of VCSELs * Mathematical models for the investigation of electrical, optical, and thermal properties of VCSELs * Case studies on the mathematical modeling of VCSELs and the implementation of simulation programs
