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Author: Ghassan Al-Hayek
Publisher:
ISBN:
Category :
Languages : fr
Pages : 146
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Book Description
CETTE THESE A POUR OBJECTIF D'ELABORER UNE APPROCHE UNIFIEE POUR LA VALIDATION ET LE TEST DE CIRCUITS INTEGRES SPECIFIES AU NIVEAU FONCTIONNEL. DEUX MOTIVATIONS PRINCIPALES SONT A LA BASE DE CE TRAVAIL. D'UN COTE, LA COMPLEXITE CROISSANTE DES CIRCUITS D'ECHELLE TRES LARGE D'INTEGRATION (VLSI) REND LA GENERATION DES TESTS EN SE BASANT SUR DES MODELES DE FAUTES DE BAS NIVEAU (PAR EXEMPLE, LE NIVEAU LOGIQUE) TRES COUTEUSE. D'UN AUTRE COTE, LES PROGRES IMPORTANTS ACCOMPLIS DANS LE DOMAINE DE LA CONCEPTION ASSISTEE PAR ORDINATEUR (CAO) PERMETTENT ACTUELLEMENT DE SPECIFIER LES CIRCUITS AU NIVEAU FONCTIONNEL EN UTILISANT DES LANGAGES DEDIES TRES EVOLUES (PAR EXEMPLE, VHDL). L'APPROCHE PROPOSEE SE DEMARQUE DES METHODES DE GENERATION TRADITIONNELLES PUISQU'ELLE CONSIDERE QUE LES FAUTES ADAPTEES AU NIVEAU FONCTIONNEL SONT DES FAUTES LOGICIELLES. AINSI, CETTE THESE DEMONTRE QUE LE TEST PAR MUTATION, JUSQU'A PRESENT APPLIQUE UNIQUEMENT AU LOGICIEL, EST EGALEMENT EFFICACE AU NIVEAU MATERIEL. AU NIVEAU FONCTIONNEL, LE TEST PAR MUTATION CONSTITUE UNE METHODE DE VALIDATION EFFICACE ET SYSTEMATIQUE POUR DETECTER LES FAUTES DE CONCEPTION. IL GARANTIT UN ENSEMBLE DE CRITERES STANDARDS (PAR EXEMPLE, LA NORME IEEE-1008) TELS QUE LA COUVERTURE D'INSTRUCTIONS, DE BRANCHES, DE PREDICATS ET DE VALEURS EXTREMES. AU NIVEAU LOGIQUE, IL A ETE MONTRE QUE LE TEST PAR MUTATION (AVEC UNE BONNE ADAPTATION AU MATERIEL) EST EGALEMENT EFFICACE POUR DETECTER LES FAUTES MATERIEL. SUR UN ENSEMBLE DE CIRCUITS REPRESENTATIFS (COMBINATOIRES ET SEQUENTIELS), UNE COUVERTURE SUPERIEURE A 99% (EN MOYENNE) A ETE ASSURE SUR LES FAUTES LOGIQUES DE COLLAGE. AINSI, LE TEST PAR MUTATION PEUT ETRE A LA BASE D'UNE SOLUTION UNIQUE POUR TESTER LES CIRCUITS ELECTRONIQUES TOUT AU LONG DE LA CYCLE DE CONCEPTION.
Author: Ghassan Al-Hayek
Publisher:
ISBN:
Category :
Languages : fr
Pages : 146
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Book Description
CETTE THESE A POUR OBJECTIF D'ELABORER UNE APPROCHE UNIFIEE POUR LA VALIDATION ET LE TEST DE CIRCUITS INTEGRES SPECIFIES AU NIVEAU FONCTIONNEL. DEUX MOTIVATIONS PRINCIPALES SONT A LA BASE DE CE TRAVAIL. D'UN COTE, LA COMPLEXITE CROISSANTE DES CIRCUITS D'ECHELLE TRES LARGE D'INTEGRATION (VLSI) REND LA GENERATION DES TESTS EN SE BASANT SUR DES MODELES DE FAUTES DE BAS NIVEAU (PAR EXEMPLE, LE NIVEAU LOGIQUE) TRES COUTEUSE. D'UN AUTRE COTE, LES PROGRES IMPORTANTS ACCOMPLIS DANS LE DOMAINE DE LA CONCEPTION ASSISTEE PAR ORDINATEUR (CAO) PERMETTENT ACTUELLEMENT DE SPECIFIER LES CIRCUITS AU NIVEAU FONCTIONNEL EN UTILISANT DES LANGAGES DEDIES TRES EVOLUES (PAR EXEMPLE, VHDL). L'APPROCHE PROPOSEE SE DEMARQUE DES METHODES DE GENERATION TRADITIONNELLES PUISQU'ELLE CONSIDERE QUE LES FAUTES ADAPTEES AU NIVEAU FONCTIONNEL SONT DES FAUTES LOGICIELLES. AINSI, CETTE THESE DEMONTRE QUE LE TEST PAR MUTATION, JUSQU'A PRESENT APPLIQUE UNIQUEMENT AU LOGICIEL, EST EGALEMENT EFFICACE AU NIVEAU MATERIEL. AU NIVEAU FONCTIONNEL, LE TEST PAR MUTATION CONSTITUE UNE METHODE DE VALIDATION EFFICACE ET SYSTEMATIQUE POUR DETECTER LES FAUTES DE CONCEPTION. IL GARANTIT UN ENSEMBLE DE CRITERES STANDARDS (PAR EXEMPLE, LA NORME IEEE-1008) TELS QUE LA COUVERTURE D'INSTRUCTIONS, DE BRANCHES, DE PREDICATS ET DE VALEURS EXTREMES. AU NIVEAU LOGIQUE, IL A ETE MONTRE QUE LE TEST PAR MUTATION (AVEC UNE BONNE ADAPTATION AU MATERIEL) EST EGALEMENT EFFICACE POUR DETECTER LES FAUTES MATERIEL. SUR UN ENSEMBLE DE CIRCUITS REPRESENTATIFS (COMBINATOIRES ET SEQUENTIELS), UNE COUVERTURE SUPERIEURE A 99% (EN MOYENNE) A ETE ASSURE SUR LES FAUTES LOGIQUES DE COLLAGE. AINSI, LE TEST PAR MUTATION PEUT ETRE A LA BASE D'UNE SOLUTION UNIQUE POUR TESTER LES CIRCUITS ELECTRONIQUES TOUT AU LONG DE LA CYCLE DE CONCEPTION.
Author: Petru Eles
Publisher: Springer Science & Business Media
ISBN: 1475727895
Category : Technology & Engineering
Languages : en
Pages : 373
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Book Description
Embedded systems are usually composed of several interacting components such as custom or application specific processors, ASICs, memory blocks, and the associated communication infrastructure. The development of tools to support the design of such systems requires a further step from high-level synthesis towards a higher abstraction level. The lack of design tools accepting a system-level specification of a complete system, which may include both hardware and software components, is one of the major bottlenecks in the design of embedded systems. Thus, more and more research efforts have been spent on issues related to system-level synthesis. This book addresses the two most active research areas of design automation today: high-level synthesis and system-level synthesis. In particular, a transformational approach to synthesis from VHDL specifications is described. System Synthesis with VHDL provides a coherent view of system synthesis which includes the high-level and the system-level synthesis tasks. VHDL is used as a specification language and several issues concerning the use of VHDL for high-level and system-level synthesis are discussed. These include aspects from the compilation of VHDL into an internal design representation to the synthesis of systems specified as interacting VHDL processes. The book emphasizes the use of a transformational approach to system synthesis. A Petri net based design representation is rigorously defined and used throughout the book as a basic vehicle for illustration of transformations and other design concepts. Iterative improvement heuristics, such as tabu search, simulated annealing and genetic algorithms, are discussed and illustrated as strategies which are used to guide the optimization process in a transformation-based design environment. Advanced topics, including hardware/software partitioning, test synthesis and low power synthesis are discussed from the perspective of a transformational approach to system synthesis. System Synthesis with VHDL can be used for advanced undergraduate or graduate courses in the area of design automation and, more specifically, of high-level and system-level synthesis. At the same time the book is intended for CAD developers and researchers as well as industrial designers of digital systems who are interested in new algorithms and techniques supporting modern design tools and methodologies.
Author: Douglas Perry
Publisher: McGraw Hill Professional
ISBN: 9780071443722
Category : Technology & Engineering
Languages : en
Pages : 272
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Book Description
Formal verification is a powerful new digital design method In this cutting-edge tutorial, two of the field's best known authors team up to show designers how to efficiently apply Formal Verification, along with hardware description languages like Verilog and VHDL, to more efficiently solve real-world design problems.
Author: Lionel Bening
Publisher: Springer Science & Business Media
ISBN: 9780792373681
Category : Computers
Languages : en
Pages : 310
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Book Description
The first edition of Principles of Verifiable RTL Design offered a common sense method for simplifying and unifying assertion specification by creating a set of predefined specification modules that could be instantiated within the designer's RTL. Since the release of the first edition, an entire industry-wide initiative for assertion specification has emerged based on ideas presented in the first edition. This initiative, known as the Open Verification Library Initiative (www.verificationlib.org), provides an assertion interface standard that enables the design engineer to capture many interesting properties of the design and precludes the need to introduce new HDL constructs (i.e., extensions to Verilog are not required). Furthermore, this standard enables the design engineer to `specify once,' then target the same RTL assertion specification over multiple verification processes, such as traditional simulation, semi-formal and formal verification tools. The Open Verification Library Initiative is an empowering technology that will benefit design and verification engineers while providing unity to the EDA community (e.g., providers of testbench generation tools, traditional simulators, commercial assertion checking support tools, symbolic simulation, and semi-formal and formal verification tools). The second edition of Principles of Verifiable RTL Design expands the discussion of assertion specification by including a new chapter entitled `Coverage, Events and Assertions'. All assertions exampled are aligned with the Open Verification Library Initiative proposed standard. Furthermore, the second edition provides expanded discussions on the following topics: start-up verification; the place for 4-state simulation; race conditions; RTL-style-synthesizable RTL (unambiguous mapping to gates); more `bad stuff'. The goal of the second edition is to keep the topic current. Principles of Verifiable RTL Design, A Functional Coding Style Supporting Verification Processes, Second Edition tells you how you can write Verilog to describe chip designs at the RTL level in a manner that cooperates with verification processes. This cooperation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labor costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.
Author: Alec G. Stanculescu
Publisher:
ISBN:
Category :
Languages : en
Pages : 232
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Book Description
Author: North Atlantic Treaty Organization. Advisory Group for Aerospace Research and Development
Publisher:
ISBN: 9789283600046
Category : Aeronautics
Languages : en
Pages :
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Book Description
Author: Christian H. Bischof
Publisher: Springer Science & Business Media
ISBN: 3540689427
Category : Computers
Languages : en
Pages : 366
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Book Description
The Fifth International Conference on Automatic Differentiation held from August 11 to 15, 2008 in Bonn, Germany, is the most recent one in a series that began in Breckenridge, USA, in 1991 and continued in Santa Fe, USA, in 1996, Nice, France, in 2000 and Chicago, USA, in 2004. The 31 papers included in these proceedings re?ect the state of the art in automatic differentiation (AD) with respect to theory, applications, and tool development. Overall, 53 authors from institutions in 9 countries contributed, demonstrating the worldwide acceptance of AD technology in computational science. Recently it was shown that the problem underlying AD is indeed NP-hard, f- mally proving the inherently challenging nature of this technology. So, most likely, no deterministic “silver bullet” polynomial algorithm can be devised that delivers optimum performance for general codes. In this context, the exploitation of doma- speci?c structural information is a driving issue in advancing practical AD tool and algorithm development. This trend is prominently re?ected in many of the pub- cations in this volume, not only in a better understanding of the interplay of AD and certain mathematical paradigms, but in particular in the use of hierarchical AD approaches that judiciously employ general AD techniques in application-speci?c - gorithmic harnesses. In this context, the understanding of structures such as sparsity of derivatives, or generalizations of this concept like scarcity, plays a critical role, in particular for higher derivative computations.
Author: Kenneth R. Baker
Publisher: John Wiley & Sons
ISBN: 1118626257
Category : Business & Economics
Languages : en
Pages : 407
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Book Description
An up-to-date and comprehensive treatment of the fundamentals of scheduling theory, including recent advances and state-of-the-art topics Principles of Sequencing and Scheduling strikes a unique balance between theory and practice, providing an accessible introduction to the concepts, methods, and results of scheduling theory and its core topics. With real-world examples and up-to-date modeling techniques, the book equips readers with the basic knowledge needed for understanding scheduling theory and delving into its applications. The authors begin with an introduction and overview of sequencing and scheduling, including single-machine sequencing, optimization and heuristic solution methods, and models with earliness and tardiness penalties. The most current material on stochastic scheduling, including correct scheduling of safety time and the use of simulation for optimization, is then presented and integrated with deterministic models. Additional topical coverage includes: Extensions of the basic model Parallel-machine models Flow shop scheduling Scheduling groups of jobs The job shop problem Simulation models for the dynamic job shop Network methods for project scheduling Resource-constrained project scheduling Stochastic and safe scheduling Extensive end-of-chapter exercises are provided, some of which are spreadsheet-oriented, and link scheduling theory to the most popular analytic platform among today's students and practitioners—the Microsoft Office Excel® spreadsheet. Extensive references direct readers to additional literature, and the book's related Web site houses material that reinforces the book's concepts, including research notes, data sets, and examples from the text. Principles of Sequencing and Scheduling is an excellent book for courses on sequencing and scheduling at the upper-undergraduate and graduate levels. It is also a valuable reference for researchers and practitioners in the fields of statistics, computer science, operations research, and engineering.
Author: Robert M. Hierons
Publisher: Springer Science & Business Media
ISBN: 3540789162
Category : Computers
Languages : en
Pages : 378
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Book Description
This book constitutes the thoroughly refereed and peer-reviewed outcome of the Formal Methods and Testing (FORTEST) network - formed as a network established under UK EPSRC funding that investigated the relationships between formal (and semi-formal) methods and software testing - now being a subject group of two BCS Special Interest Groups: Formal Aspects of Computing Science (BCS FACS) and Special Interest Group in Software Testing (BCS SIGIST). Each of the 12 chapters in this book describes a way in which the study of formal methods and software testing can be combined in a manner that brings the benefits of formal methods (e.g., precision, clarity, provability) with the advantages of testing (e.g., scalability, generality, applicability).
Author: Joseph Sifakis
Publisher:
ISBN: 9781601986603
Category : Computers
Languages : en
Pages : 84
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Book Description
Deals with the formalization of the design of mixed hardware/software systems. It advocates rigorous system design as a model-based process leading from requirements to correct implementations and presents the current state of the art in system design, discusses its limitations and identifies possible avenues for overcoming them.
