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Author: Byong Chan Lim
Publisher:
ISBN:
Category :
Languages : en
Pages :
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Book Description
Today it is difficult to validate a mixed-signal System-on-Chip, i.e., one which contains analog and digital components. The problem is that the analog and digital subsystems are usually strongly intertwined so they must be validated together as a system, but the validation approach for analog and digital blocks are completely different. We address this problem by creating high-level functional models of the analog components that are compatible with top-level digital system validation, and then providing a method of formal checking to ensure that these functional models match the operation of the transistor level implementations of these blocks. The formal checking of the functional analog models is enabled by observing that the result surface of an analog block is a smooth function of its analog inputs -- that is what makes it an analog block. This smooth result surface means it is not difficult to "explore" the design space of an analog block. We use this insight to create an equivalence checker between two analog descriptions: a SPICE netlist and its Verilog model. This checker exploits the fact that most analog circuits have a linear intent. Lastly we use this same insight to simplify statistical analysis of large mixed-signal systems to ensure that the system is robust to process variations. We describe a way to characterize the statistical behavior of circuits and to map the results to the functional model so one can estimate the parametric yield of the system by running system-level Monte Carlo simulations with analog models instead of circuit netlists.
Author: Byong Chan Lim
Publisher:
ISBN:
Category :
Languages : en
Pages :
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Book Description
Today it is difficult to validate a mixed-signal System-on-Chip, i.e., one which contains analog and digital components. The problem is that the analog and digital subsystems are usually strongly intertwined so they must be validated together as a system, but the validation approach for analog and digital blocks are completely different. We address this problem by creating high-level functional models of the analog components that are compatible with top-level digital system validation, and then providing a method of formal checking to ensure that these functional models match the operation of the transistor level implementations of these blocks. The formal checking of the functional analog models is enabled by observing that the result surface of an analog block is a smooth function of its analog inputs -- that is what makes it an analog block. This smooth result surface means it is not difficult to "explore" the design space of an analog block. We use this insight to create an equivalence checker between two analog descriptions: a SPICE netlist and its Verilog model. This checker exploits the fact that most analog circuits have a linear intent. Lastly we use this same insight to simplify statistical analysis of large mixed-signal systems to ensure that the system is robust to process variations. We describe a way to characterize the statistical behavior of circuits and to map the results to the functional model so one can estimate the parametric yield of the system by running system-level Monte Carlo simulations with analog models instead of circuit netlists.
Author: Jess Chen
Publisher: Lulu.com
ISBN: 130003520X
Category : Technology & Engineering
Languages : en
Pages : 410
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Book Description
This book, the Mixed-signal Methodology Guide: Advanced Methodology for AMS IP and SoC Design, Verification, and Implementation provides a broad overview of the design, verification and implementation methodologies required for today's mixed-signal designs. The book covers mixed-signal design trends and challenges, abstraction of analog using behavioral models, assertion-based metric-driven verification methodology applied on analog and mixed-signal and verification of low power intent in mixed-signal design. It also describes methodology for physical implementation in context of concurrent mixed-signal design and for handling advanced node physical effects. The book contains many practical examples of models and techniques. The authors believe it should serve as a reference to many analog, digital and mixed-signal designers, verification, physical implementation engineers and managers in their pursuit of information for a better methodology required to address the challenges of modern mixed-signal design.
Author: Ricardo Ramirez
Publisher:
ISBN:
Category :
Languages : en
Pages : 188
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Book Description
The verification of analog designs has been a challenging task for a few years now. Several approaches have been taken to tackle the main problem related to the complexity that such task presents to design and verification teams. The methodology presented in this document is based on the experiences and research work carried out by the Concordia University's Hardware Verification and the U. of Texas' IC systems design groups. The representation of complex systems where different interactions either mechanical or electrical take place requires an intricate set of mathematical descriptions which greatly vary according to the system under test. As a simple and very relevant example one can look at the integration of RF-MEMS as active elements in System-On-Chip architectures. In order to tackle such heterogeneous interaction for a consistent model, the use of stochastic hybrid models is described and implemented for very simple examples using high level modeling tools for a succinct and precise description.
Author: Bramhananda Marathe
Publisher: Createspace Independent Publishing Platform
ISBN: 9781519265265
Category :
Languages : en
Pages : 0
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Book Description
Introduction The purpose of this book is to provide insight and intuition into the analog and analog-mixed signal system verification. It is also a journey the author of this book has been through on the way to tackle practical design and verification challenges with state of art analog and mixed signal designs. Motivation for authoring this book The digital design verification skill set is very different than analog design and verification. Traditionally, the analog block level verification is performed by the analog designers, and digital design verification is performed by digital design verification engineer. Lack of cross domain skill set makes it challenging to perform verification at mixed-signal level. Hence, either analog designer engineer should learn advanced digital verification techniques or digital design verification engineer embrace analog verification to become analog-mixed signal verification engineer. This book is written keeping this new trend in mind, hence it covers digital design fundamentals, digital design verification as well as analog design fundamentals, and analog performance verification. Organization of this book Keeping the readers of analog verification or digital design verification background in mind, the book has first 5 chapters focused on the fundamentals of the analog design, digital design, and its verification. Chapter 6 and chapter 7 focuses on the analog-mixed signal design verification and behavioral modeling respectively. Chapter 8 is dedicated to the low power verification techniques. Chapter 1: Introduction to Analog Mixed Signal Verification This chapter discusses about the evolution of the verification methodologies, history of analog-mixed signal designs, applications, and future trends. Chapter 2: Analog Design Fundamentals The purpose of this chapter is to give an overview of the analog design fundamentals for digital design background engineers. Major focus is given on analog behavior, design criteria and their concept rather than design themselves, such as voltage/current reference, some of the basic key analog design properties such as gain, band width, basics of jitter, eye diagram, etc. Chapter 3: Digital Design Fundamentals In this chapter, we explain digital design flow, combinational and sequential logic design fundamentals, design for testability, concepts of timing, and timing verification. Chapter 4: Analog Verification This chapter focuses on analog performance verification and functional verification under the context of mixed signal design hierarchical verification rather than the detail performance analysis of the designs themselves. Chapter 5: Digital Design Verification This chapter explains the tools and methodologies that are evolved over the period that are predicated on predictable quality and verification efficiency. The chapter contains the sections on the coverage driven verification (CDV) methodology, assertion based verification (ABV) methodology, and overview of the CDV using Open Verification Methodology (OVM). Chapter 6: Analog-Mixed Signal Verification This chapter discusses about the AMS verification phases, choosing the right abstraction of DUT for a given verification challenge, AMS verification planning, testplanning for AMS design verification, and testbench development with re-use in mind. Chapter 7: Analog Behavioral Modeling This chapter explains about the applications of analog behavioral models, modeling methodology, simple examples of various analog behavioral modeling styles, selection of accuracy level of the models based on the verification plan, model verification, and signoff. Chapter 8: Low Power Verification The purpose of this chapter is to explain the low power design verification challenges, key low power design elements, low power design techniques, low power design and verification cycle, testplanning for low power design verification, power aware digital, and AMS simulations.
Author: Sabrina Liao
Publisher:
ISBN:
Category :
Languages : en
Pages :
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Book Description
Mixed-signal systems-on-chip (SoC's) are complex entities that contain very tightly coupled analog and digital circuits. Validating these complex systems requires simulating the entire design through a large number of test vectors, and each test vector might in turn lead to a long simulation. Due to traditionally differing views of validation as well as design tools for analog and digital, validation of an SoC is not easy. Behavioral modeling is an attractive approach that tries to address this issue by replacing analog circuits with high-level functional models to speed up simulation while retaining some of the analog behavior. This dissertation proposes a method for creating these models in an event-driven, digital modeling language. Piecewise linear approximation is used to represent continuous time analog signals as value-slope pairs that update at discrete instances in time. By breaking analog circuits into sub-blocks with mostly unidirectional ports and leveraging the (nearly) linear intent of analog circuits, an efficient method of computing module output that avoids time integration is possible. The overall result is analog behavioral models that are pin-accurate, fast to simulate and capture the key dynamics in analog circuits. Models of various types of circuits (a simple RC filter, a phase interpolator, a comparator and a current DAC) are used to illustrate the wide applicability of the proposed modeling method. A 250MS/s track and hold, a 2.5-1.8V switching regulator, and a 1GHz PLL are also modeled to verify the preservation of important circuit behaviors as well as to gauge these models' computation complexity.
Author: Sorin Alexander Huss
Publisher: Springer Science & Business Media
ISBN: 0306481014
Category : Technology & Engineering
Languages : en
Pages : 174
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Book Description
For the first time, this up-to-date text combines the main issues of the hardware description language VHDL-AMS aimed at model representation of mixed-signal circuits and systems, characterization methods and tools for the extraction of model parameters, and modelling methodologies for accurate high-level behavioural models.
Author: Christoph Grimm
Publisher: Springer Science & Business Media
ISBN: 1402079915
Category : Computers
Languages : en
Pages : 353
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Book Description
Contributions on UML address the application of UML in the specification of embedded HW/SW systems. C-Based System Design embraces the modeling of operating systems, modeling with different models of computation, generation of test patterns, and experiences from case studies with SystemC. Analog and Mixed-Signal Systems covers rules for solving general modeling problems in VHDL-AMS, modeling of multi-nature systems, synthesis, and modeling of Mixed-Signal Systems with SystemC. Languages for formal methods are addressed by contributions on formal specification and refinement of hybrid, embedded and real-time stems. Together with articles on new languages such as SystemVerilog and Software Engineering in Automotive Systems the contributions selected for this book embrace all aspects of languages and models for specification, design, modeling and verification of systems. Therefore, the book gives an excellent overview of the actual state-of-the-art and the latest research results.
Author: Jose Luis Huertas Díaz
Publisher: Springer Science & Business Media
ISBN: 0387235213
Category : Technology & Engineering
Languages : en
Pages : 310
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Book Description
Test and Design-for-Testability in Mixed-Signal Integrated Circuits deals with test and design for test of analog and mixed-signal integrated circuits. Especially in System-on-Chip (SoC), where different technologies are intertwined (analog, digital, sensors, RF); test is becoming a true bottleneck of present and future IC projects. Linking design and test in these heterogeneous systems will have a tremendous impact in terms of test time, cost and proficiency. Although it is recognized as a key issue for developing complex ICs, there is still a lack of structured references presenting the major topics in this area. The aim of this book is to present basic concepts and new ideas in a manner understandable for both professionals and students. Since this is an active research field, a comprehensive state-of-the-art overview is very valuable, introducing the main problems as well as the ways of solution that seem promising, emphasizing their basis, strengths and weaknesses. In essence, several topics are presented in detail. First of all, techniques for the efficient use of DSP-based test and CAD test tools. Standardization is another topic considered in the book, with focus on the IEEE 1149.4. Also addressed in depth is the connecting design and test by means of using high-level (behavioural) description techniques, specific examples are given. Another issue is related to test techniques for well-defined classes of integrated blocks, like data converters and phase-locked-loops. Besides these specification-driven testing techniques, fault-driven approaches are described as they offer potential solutions which are more similar to digital test methods. Finally, in Design-for-Testability and Built-In-Self-Test, two other concepts that were taken from digital design, are introduced in an analog context and illustrated for the case of integrated filters. In summary, the purpose of this book is to provide a glimpse on recent research results in the area of testing mixed-signal integrated circuits, specifically in the topics mentioned above. Much of the work reported herein has been performed within cooperative European Research Projects, in which the authors of the different chapters have actively collaborated. It is a representative snapshot of the current state-of-the-art in this emergent field.
Author: Krishnendu Chatterjee
Publisher: Springer Science & Business Media
ISBN: 3642152961
Category : Computers
Languages : en
Pages : 266
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Book Description
This book constitutes the proceedings of the 8th International Conference on Formal Modeling and Analysis of Timed Systems, FORMATS 2010, held in Klosterneuburg, Austria in September 2010. The 14 papers presented were carefully reviewed and selected from 31 submissions. In addition, the volume contains 3 invited talks and 2 invited tutorials.The aim of FORMATS is to promote the study of fundamental and practical aspects of timed systems, and to bring together researchers from different disciplines that share an interest in the modeling and analysis of timed systems. Typical topics include foundations and semantics, methods and tools, and applications.
Author: Mohamed Hamed Zaki Hussein
Publisher:
ISBN:
Category :
Languages : en
Pages : 0
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Book Description
Embedded systems are becoming a core technology in a growing range of electronic devices. Cornerstones of embedded systems are analog and mixed signal (AMS) designs, which are integrated circuits required at the interfaces with the real world environment. The verification of AMS designs is concerned with the assurance of correct functionality, in addition to checking whether an AMS design is robust with respect to different types of inaccuracies like parameter tolerances, nonlinearities, etc. The verification framework described in this thesis is composed of two proposed methodologies each concerned with a class of AMS designs, i.e., continuous-time AMS designs and discrete-time AMS designs. The common idea behind both methodologies is built on top of Bounded Model Checking (BMC) algorithms. In BMC, we search for a counter-example for a property verified against the design model for bounded number of verification steps. If a concrete counter-example is found, then the verification is complete and reports a failure, otherwise, we need to increment the number of steps until property validation is achieved. In general, the verification is not complete because of limitations in time and memory needed for the verification. To alleviate this problem, we observed that under certain conditions and for some classes of specification properties, the verification can be complete if we complement the BMC with other methods such as abstraction and constraint based verification methods. To test and validate the proposed approaches, we developed a prototype implementation in Mathematica and we targeted analog and mixed signal systems, like oscillator circuits, switched capacitor based designs, Delta-Sigma modulators for our initial tests of this approach.
