FPGA-based Fault Tolerant Design and Deterministic Routing-based Synthesis for Digital Microfluidic Biochips

FPGA-based Fault Tolerant Design and Deterministic Routing-based Synthesis for Digital Microfluidic Biochips PDF Author: Onkar Todakar
Publisher:
ISBN:
Category :
Languages : en
Pages : 71

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Book Description
Microfluidic biochips have been widely used as an alternative to traditional laboratory equipment. They offer a considerable advantage over traditional equipment when the reduction in cost, area and efforts is considered. A lot of research has been done on designing general purpose, cost-effective architectures and also on methods to automate the mapping of assays on to these biochips. Biochips are susceptible to failures due to various reasons such as manufacturing defects, wear and tear etc. We propose a fault tolerant scheduling algorithm which reconfigures the DMFBs in the presence of such faults. A faulty module (for example a mixer with 2x5 electrodes) can be reconfigured using a droplet routing approach that routes droplet, avoiding the faulty electrodes. We observe an average 23% reduction in the assay completion time, when compared to a DMFB with a faulty module. We further extend this routing-based approach to propose an algorithm to map assays to DMFBs. Most of the previous work on mapping assays assumes the presence of virtual modules on DMFBs and schedules operations on them. In our work we propose a deterministic greedy algorithm that routes the droplet on a random sequence of electrodes rather than restricting it to a virtual module to execute the operation. Our algorithm moves the droplets on the DMFB such that the operation is completed in the minimum possible time. The results show approximately 43% reduction in assay completion time, when compared to traditional module based mapping algorithm on a FPGA style DMFB array, and 26% improvement compared to the randomized routing - based synthesis algorithm GRASP.

FPGA-based Fault Tolerant Design and Deterministic Routing-based Synthesis for Digital Microfluidic Biochips

FPGA-based Fault Tolerant Design and Deterministic Routing-based Synthesis for Digital Microfluidic Biochips PDF Author: Onkar Todakar
Publisher:
ISBN:
Category :
Languages : en
Pages : 71

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Book Description
Microfluidic biochips have been widely used as an alternative to traditional laboratory equipment. They offer a considerable advantage over traditional equipment when the reduction in cost, area and efforts is considered. A lot of research has been done on designing general purpose, cost-effective architectures and also on methods to automate the mapping of assays on to these biochips. Biochips are susceptible to failures due to various reasons such as manufacturing defects, wear and tear etc. We propose a fault tolerant scheduling algorithm which reconfigures the DMFBs in the presence of such faults. A faulty module (for example a mixer with 2x5 electrodes) can be reconfigured using a droplet routing approach that routes droplet, avoiding the faulty electrodes. We observe an average 23% reduction in the assay completion time, when compared to a DMFB with a faulty module. We further extend this routing-based approach to propose an algorithm to map assays to DMFBs. Most of the previous work on mapping assays assumes the presence of virtual modules on DMFBs and schedules operations on them. In our work we propose a deterministic greedy algorithm that routes the droplet on a random sequence of electrodes rather than restricting it to a virtual module to execute the operation. Our algorithm moves the droplets on the DMFB such that the operation is completed in the minimum possible time. The results show approximately 43% reduction in assay completion time, when compared to traditional module based mapping algorithm on a FPGA style DMFB array, and 26% improvement compared to the randomized routing - based synthesis algorithm GRASP.

Fault-Tolerant Digital Microfluidic Biochips

Fault-Tolerant Digital Microfluidic Biochips PDF Author: Paul Pop
Publisher: Springer
ISBN: 3319230727
Category : Technology & Engineering
Languages : en
Pages : 238

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Book Description
This book describes for researchers in the fields of compiler technology, design and test, and electronic design automation the new area of digital microfluidic biochips (DMBs), and thus offers a new application area for their methods. The authors present a routing-based model of operation execution, along with several associated compilation approaches, which progressively relax the assumption that operations execute inside fixed rectangular modules. Since operations can experience transient faults during the execution of a bioassay, the authors show how to use both offline (design time) and online (runtime) recovery strategies. The book also presents methods for the synthesis of fault-tolerant application-specific DMB architectures. · Presents the current models used for the research on compilation and synthesis techniques of DMBs in a tutorial fashion; · Includes a set of “benchmarks”, which are presented in great detail and includes the source code of most of the techniques presented, including solutions to the basic compilation and synthesis problems; · Discusses several new research problems in detail, using numerous examples.

Digital Microfluidic Biochips

Digital Microfluidic Biochips PDF Author: Krishnendu Chakrabarty
Publisher: CRC Press
ISBN: 1351837532
Category : Technology & Engineering
Languages : en
Pages : 216

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Book Description
Digital Microfluidic Biochips focuses on the automated design and production of microfluidic-based biochips for large-scale bioassays and safety-critical applications. Bridging areas of electronic design automation with microfluidic biochip research, the authors present a system-level design automation framework that addresses key issues in the design, analysis, and testing of digital microfluidic biochips. The book describes a new generation of microfluidic biochips with more complex designs that offer dynamic reconfigurability, system scalability, system integration, and defect tolerance. Part I describes a unified design methodology that targets design optimization under resource constraints. Part II investigates cost-effective testing techniques for digital microfluidic biochips that include test resource optimization and fault detection while running normal bioassays. Part III focuses on different reconfiguration-based defect tolerance techniques designed to increase the yield and dependability of digital microfluidic biochips. Expanding upon results from ongoing research on CAD for biochips at Duke University, this book presents new design methodologies that address some of the limitations in current full-custom design techniques. Digital Microfluidic Biochips is an essential resource for achieving the integration of microfluidic components in the next generation of system-on-chip and system-in-package designs.

Digital Microfluidic Biochips

Digital Microfluidic Biochips PDF Author: Krishnendu Chakrabarty
Publisher: CRC Press
ISBN: 143985873X
Category : Medical
Languages : en
Pages : 377

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Book Description
Microfluidics-based biochips combine electronics with biochemistry, providing access to new application areas in a wide variety of fields. Continued technological innovations are essential to assuring the future role of these chips in functional diversification in biotech, pharmaceuticals, and other industries.Revolutionary guidance on design, opti

Fast Architecture-Level Synthesis of Fault-Tolerant Flow-Based Microfluidic Biochips

Fast Architecture-Level Synthesis of Fault-Tolerant Flow-Based Microfluidic Biochips PDF Author: Wei-Lun Huang
Publisher:
ISBN:
Category :
Languages : en
Pages :

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Book Description


PhD.

PhD. PDF Author: Mirela Alistar
Publisher:
ISBN:
Category :
Languages : en
Pages : 0

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Book Description


Compilation and Synthesis for Fault-tolerant Digital Microfluidic Biochips

Compilation and Synthesis for Fault-tolerant Digital Microfluidic Biochips PDF Author: Mirela Alistar
Publisher:
ISBN:
Category :
Languages : en
Pages : 0

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Book Description


2018 IEEE ACM International Conference on Computer Aided Design (ICCAD)

2018 IEEE ACM International Conference on Computer Aided Design (ICCAD) PDF Author: IEEE Staff
Publisher:
ISBN: 9781538675021
Category :
Languages : en
Pages :

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Book Description
ICCAD serves EDA and design professionals, highlighting new challenges and innovative solutions for integrated circuit design technology and systems

Introduction to Algorithms, third edition

Introduction to Algorithms, third edition PDF Author: Thomas H. Cormen
Publisher: MIT Press
ISBN: 0262258102
Category : Computers
Languages : en
Pages : 1313

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Book Description
The latest edition of the essential text and professional reference, with substantial new material on such topics as vEB trees, multithreaded algorithms, dynamic programming, and edge-based flow. Some books on algorithms are rigorous but incomplete; others cover masses of material but lack rigor. Introduction to Algorithms uniquely combines rigor and comprehensiveness. The book covers a broad range of algorithms in depth, yet makes their design and analysis accessible to all levels of readers. Each chapter is relatively self-contained and can be used as a unit of study. The algorithms are described in English and in a pseudocode designed to be readable by anyone who has done a little programming. The explanations have been kept elementary without sacrificing depth of coverage or mathematical rigor. The first edition became a widely used text in universities worldwide as well as the standard reference for professionals. The second edition featured new chapters on the role of algorithms, probabilistic analysis and randomized algorithms, and linear programming. The third edition has been revised and updated throughout. It includes two completely new chapters, on van Emde Boas trees and multithreaded algorithms, substantial additions to the chapter on recurrence (now called “Divide-and-Conquer”), and an appendix on matrices. It features improved treatment of dynamic programming and greedy algorithms and a new notion of edge-based flow in the material on flow networks. Many exercises and problems have been added for this edition. The international paperback edition is no longer available; the hardcover is available worldwide.

System-on-Chip Test Architectures

System-on-Chip Test Architectures PDF Author: Laung-Terng Wang
Publisher: Morgan Kaufmann
ISBN: 0080556809
Category : Technology & Engineering
Languages : en
Pages : 893

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Book Description
Modern electronics testing has a legacy of more than 40 years. The introduction of new technologies, especially nanometer technologies with 90nm or smaller geometry, has allowed the semiconductor industry to keep pace with the increased performance-capacity demands from consumers. As a result, semiconductor test costs have been growing steadily and typically amount to 40% of today's overall product cost. This book is a comprehensive guide to new VLSI Testing and Design-for-Testability techniques that will allow students, researchers, DFT practitioners, and VLSI designers to master quickly System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs. Emphasizes VLSI Test principles and Design for Testability architectures, with numerous illustrations/examples. Most up-to-date coverage available, including Fault Tolerance, Low-Power Testing, Defect and Error Tolerance, Network-on-Chip (NOC) Testing, Software-Based Self-Testing, FPGA Testing, MEMS Testing, and System-In-Package (SIP) Testing, which are not yet available in any testing book. Covers the entire spectrum of VLSI testing and DFT architectures, from digital and analog, to memory circuits, and fault diagnosis and self-repair from digital to memory circuits. Discusses future nanotechnology test trends and challenges facing the nanometer design era; promising nanotechnology test techniques, including Quantum-Dots, Cellular Automata, Carbon-Nanotubes, and Hybrid Semiconductor/Nanowire/Molecular Computing. Practical problems at the end of each chapter for students.