Formal Verification of Digital Circuits Using Symbolic Ternary System Models PDF Download

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Formal Verification of Digital Circuits Using Symbolic Ternary System Models

Formal Verification of Digital Circuits Using Symbolic Ternary System Models PDF Author: R. E. Bryant
Publisher:
ISBN:
Category : Computer input-output equipment
Languages : en
Pages : 24

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Book Description
Abstract: "Formal hardware verification based on ternary digital system modeling uses a third value X to indicate an unknown or indeterminate condition. In our methodology, the desired behavior of the circuit is expressed as assertions in a notation using a combination of Boolean expressions and temporal logic operators. An assertion is verified by translating it into a sequence of patterns and checks for a ternary symbolic simulator. This methodology has been used to verify a number of full scale circuit designs."