Fabrication of AlGaN-GaN-InN High Electron Mobility Transistors PDF Download
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Languages : en
Pages : 10
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The effect of various growth parameters such as temperature, V/III ratio and the growth rate on the properties of InN layers grown by MOCVD was investigated. The InN layers were deposited onto 2 micrometer thick GaN-on-c-plane sapphire films. In addition, the different precursor injection procedures were investigated. Since the growth of InN required very low deposition temperatures around 600 deg. C, for the deposition of InN/GaN heterostructures similar experiments were performed to optimize the growth of GaN at comparable growth temperatures. The fabrication of GaN/InN/GaN structures for device applications was complicated by intermixing and surface segregation of indium and defect formation in heterostructures related to the large lattice mismatch of 10% between GaN and InN.
Author:
Publisher:
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Category :
Languages : en
Pages : 10
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Book Description
The effect of various growth parameters such as temperature, V/III ratio and the growth rate on the properties of InN layers grown by MOCVD was investigated. The InN layers were deposited onto 2 micrometer thick GaN-on-c-plane sapphire films. In addition, the different precursor injection procedures were investigated. Since the growth of InN required very low deposition temperatures around 600 deg. C, for the deposition of InN/GaN heterostructures similar experiments were performed to optimize the growth of GaN at comparable growth temperatures. The fabrication of GaN/InN/GaN structures for device applications was complicated by intermixing and surface segregation of indium and defect formation in heterostructures related to the large lattice mismatch of 10% between GaN and InN.
Author: Peter Javorka
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Languages : en
Pages :
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Author: Juraj Bernát
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Category :
Languages : en
Pages : 152
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Languages : en
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Author: Tun-Hsiang Chang
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Languages : en
Pages :
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Author: Anthony Calzolaro
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Category :
Languages : en
Pages : 0
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Author: Chung-Wang Su
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Category :
Languages : en
Pages :
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Author: Christian Haupt
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ISBN: 9783839603031
Category :
Languages : en
Pages : 175
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In this work a scaling approach is studied to develop a transistor technology which achieves a high gain as well as a high output power at W-band frequencies and can be applied in the existing fabrication process for MMICs. Following the theoretical scaling rules for field effect transistors lateral and vertical critical dimensions of 100 nm and 10 nm must be achieved, respectively. Therefore various new fabrication processes were developed to enable the new critical dimensions with a sufficient production yield for MMIC fabrication. Transistors fabricated with these methods were evaluated regarding the influence of the scaled geometries on the device characteristics using S-parameter as well as DC-measurements. As a result a transistor technology could be established with a transconductance above 600 mS/mm which is one of the highest reported values for GaN-based HEMTs so far. Furthermore, these transistors feature a very low parasitic capacitance of 0.3 pF/mm and can as a consequence achieve a current-gain cut-off frequency of more than 110 GHz. Besides the high frequency characteristics short channel effects and their influence on the device characteristics were also evaluated. The scaled transistors are dominated by a drain induced barrier lowering (DIBL) and a critical aspect ratio of approximately 14 is necessary to suppress the DIBL-effect in GaN-HEMTs.
Author: 何昕逸
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Category :
Languages : en
Pages :
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Author: Michael Hosch
Publisher: Cuvillier Verlag
ISBN: 3736938446
Category : Technology & Engineering
Languages : en
Pages : 129
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This thesis deals with the analysis and optimization of some of the most prominent non-ideal effects in AlGaN/GaN high electron mobility transistors used in microwave applications as well as the optimization of the RF gain. The effect of current collapse, the root cause of leakage currents as well as field-dependent self-heating effects have been investigated by eletrical characterization using well established techniques and have been analyzed using 2-dimensional physical device simulations. It will be shown that the origin of all effects is strongly related to the device surface and some are even competing effects making device optimization a challenge. However, a detailed localization of the regions affecting device performance will be given leading to a better understanding for fabrication process optimization. Finally, I simulation study is conducted giving suggestions for RF gain improvement based on very simple device layout variations.
