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Author: Rudy J. van de Plassche
Publisher: Springer Science & Business Media
ISBN: 1475723539
Category : Technology & Engineering
Languages : en
Pages : 394
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Book Description
The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ ing portable video devices such as camcorders, personal communication devices such as wireless LAN transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif ferent conversion techniques applicable in this range of sample rates is dis cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi zation of capacitor sizes, design of low-voltage transmission gates, and opti mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of "analog clock cycles" required to produce one effective output sample of the signal being quantized.
Author: Rudy J. van de Plassche
Publisher: Springer Science & Business Media
ISBN: 1475723539
Category : Technology & Engineering
Languages : en
Pages : 394
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Book Description
The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ ing portable video devices such as camcorders, personal communication devices such as wireless LAN transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif ferent conversion techniques applicable in this range of sample rates is dis cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi zation of capacitor sizes, design of low-voltage transmission gates, and opti mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of "analog clock cycles" required to produce one effective output sample of the signal being quantized.
Author: Gil Cho Ahn
Publisher:
ISBN:
Category : Analog-to-digital converters
Languages : en
Pages : 144
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Book Description
With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply voltage to insure device reliability. Even though the largest amount of signal processing is done in the digital domain, the on-chip analog-to-digital interface circuitry (analog-to-digital and digital-to-analog converters) is an important functional block in the system. These converters are also required to operate with low-voltage supply. In this thesis, design techniques for low-voltage and low-power analog-to-digital converters are proposed. The specific research contributions of this work include (1) introduction of a new low-voltage switching technique for switched- capacitor circuit design, (2) development of low-voltage and low-distortion delta- sigma modulator, (3) development of low-voltage switched-capacitor multiplying digital-to-analog converter (MDAC), (4) a new architecture for the low-power Nyquist rate pipelined ADC design. These design techniques enable the implementation of low-voltage and low-power CMOS analog-to-digital converters. To demonstrate the proposed design techniques, a 0.6 V, 82 dB, 2-2 cascaded audio delta-sigma ADC, a 0.9 V, 10-bit, 20MS/s CMOS pipelined ADC and a 2.4 V, 12-bit, 10MS/s CMOS pipelined ADC were implemented in standard CMOS processes.
Author: Amir Zjajo
Publisher: Springer Science & Business Media
ISBN: 9048197252
Category : Technology & Engineering
Languages : en
Pages : 311
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Book Description
With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.
Author: Sai-Weng Sin
Publisher: Springer Science & Business Media
ISBN: 9048197104
Category : Technology & Engineering
Languages : en
Pages : 147
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Book Description
Analog-to-Digital Converters (ADCs) play an important role in most modern signal processing and wireless communication systems where extensive signal manipulation is necessary to be performed by complicated digital signal processing (DSP) circuitry. This trend also creates the possibility of fabricating all functional blocks of a system in a single chip (System On Chip - SoC), with great reductions in cost, chip area and power consumption. However, this tendency places an increasing challenge, in terms of speed, resolution, power consumption, and noise performance, in the design of the front-end ADC which is usually the bottleneck of the whole system, especially under the unavoidable low supply-voltage imposed by technology scaling, as well as the requirement of battery operated portable devices. Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters will present new techniques tailored for low-voltage and high-speed Switched-Capacitor (SC) ADC with various design-specific considerations.
Author: Min Gyu Kim
Publisher:
ISBN:
Category : Analog-to-digital converters
Languages : en
Pages : 144
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Book Description
The demand for portable electronic systems and the continued down-scaling of device dimensions resulted in rapid improvement in the performance of integrated systems. Several low-voltage design techniques have been proposed to operate analog circuits with sub-1V supply. However, these techniques require higher power consumption to achieve large dynamic range while operating with low supply voltage. In this thesis, two low-power design techniques for low-voltage data converters are proposed. The first technique is low-voltage double-sampling method for delta-sigma analog-to-digital converters using a combination of switched-RC technique and floating switched-capacitor configuration. The second technique is an improved clocking scheme for algorithmic analog-to-digital converters with on-chip delay-locked-loop. A 0.9V 92dB delta-sigma audio ADC and a 10MS/s 11-b algorithmic ADC were implemented to demonstrate the proposed design techniques.
Author: Michiel Steyaert
Publisher: Springer Science & Business Media
ISBN: 9400719264
Category : Technology & Engineering
Languages : en
Pages : 376
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Book Description
Analog Circuit Design contains the contribution of 18 tutorials of the 20th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of: Topic 1 : Low Voltage Low Power, chairman: Andrea Baschirotto Topic 2 : Short Range Wireless Front-Ends, chairman: Arthur van Roermund Topic 3 : Power Management and DC-DC, chairman : Michiel Steyaert. Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design course.
Author: Johan Huijsing
Publisher: Springer Science & Business Media
ISBN: 1475724624
Category : Technology & Engineering
Languages : en
Pages : 422
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Book Description
Johan H. Huijsing This book contains 18 tutorial papers concentrated on 3 topics, each topic being covered by 6 papers. The topics are: Low-Noise, Low-Power, Low-Voltage Mixed-Mode Design with CAD Tools Voltage, Current, and Time References The papers of this book were written by top experts in the field, currently working at leading European and American universities and companies. These papers are the reviewed versions of the papers presented at the Workshop on Advances in Analog Circuit Design. which was held in Villach, Austria, 26-28 April 1995. The chairman of the Workshop was Dr. Franz Dielacher from Siemens, Austria. The program committee existed of Johan H. Huijsing from the Delft University of Technology, Prof.Willy Sansen from the Catholic University of Leuven, and Dr. Rudy 1. van der Plassche from Philips Eindhoven. This book is the fourth of aseries dedicated to the design of analog circuits. The topics which were covered earlier were: Operational Amplifiers Analog to Digital Converters Analog Computer Aided Design Mixed AlD Circuit Design Sensor Interface Circuits Communication Circuits Low-Power, Low-Voltage Integrated Filters Smart Power As the Workshop will be continued year by year, a valuable series of topics will be built up from all the important areas of analog circuit design. I hope that this book will help designers of analog circuits to improve their work and to speed it up.
Author: Chung-Chih Hung
Publisher: Springer Nature
ISBN: 3030888452
Category : Technology & Engineering
Languages : en
Pages : 231
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Book Description
This book introduces the origin of biomedical signals and the operating principles behind them and introduces the characteristics of common biomedical signals for subsequent signal measurement and judgment. Since biomedical signals are captured by wearable devices, sensor devices, or implanted devices, these devices are all battery-powered to maintain long working time. We hope to reduce their power consumption to extend service life, especially for implantable devices, because battery replacement can only be done through surgery. Therefore, we must understand how to design low-power integrated circuits. Both implantable and in-vitro medical signal detectors require two basic components to collect and transmit biomedical signals: an analog-to-digital converter and a frequency synthesizer because these measured biomedical signals are wirelessly transmitted to the relevant receiving unit. The core unit of wireless transmission is the frequency synthesizer, which provides a wide frequency range and stable frequency to demonstrate the quality and performance of the wireless transmitter. Therefore, the basic operating principle and model of the frequency synthesizer are introduced. We also show design examples and measurement results of a low-power low-voltage integer-N frequency synthesizer for biomedical applications. The detection of biomedical signals needs to be converted into digital signals by an analog-to-digital converter to facilitate subsequent signal processing and recognition. Therefore, the operating principle of the analog-to-digital converter is introduced. We also show implementation examples and measurement results of low-power low-voltage analog-to-digital converters for biomedical applications.
Author: Rida Shawky Assaad
Publisher:
ISBN:
Category :
Languages : en
Pages :
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Book Description
Author: Mikko E. Waltari
Publisher: Springer Science & Business Media
ISBN: 1402072449
Category : Technology & Engineering
Languages : en
Pages : 256
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Book Description
This useful monograph presents a total of seven prototypes: two double-sampled S/H circuits, a time-interleaved ADC, an IF-sampling self-calibrated pipelined ADC, a current steering DAC with a deglitcher, and two pipelined ADCs employing the SO techniques.
