Background Digital Code-error Calibration of Analog-to-digital Converters PDF Download
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Author: Tzi-Hsiung Shu
Publisher:
ISBN:
Category : Analog-to-digital converters
Languages : en
Pages : 152
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Book Description
Author: Tzi-Hsiung Shu
Publisher:
ISBN:
Category : Analog-to-digital converters
Languages : en
Pages : 152
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Book Description
Author: Christopher Leonidas David
Publisher:
ISBN:
Category :
Languages : en
Pages : 370
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Book Description
Abstract: The growth of digital systems underscores the need to convert analog information to the digital domain at high speeds and with great accuracy. Analog-to-Digital Converter (ADC) calibration is often a limiting factor, requiring longer calibration times to achieve higher accuracy. The goal of this dissertation is to perform a fully digital background calibration using an arbitrary input signal for A/D converters. The work presented here adapts the cyclic "Split-ADC" calibration method to the time interleaved (TI) and successive approximation register (SAR) architectures. The TI architecture has three types of linear mismatch errors: offset, gain and aperture time delay. By correcting all three mismatch errors in the digital domain, each converter is capable of operating at the fastest speed allowed by the process technology. The total number of correction parameters required for calibration is dependent on the interleaving ratio, M. To adapt the "Split-ADC" method to a TI system, 2M+1 half-sized converters are required to estimate 3(2M+1) correction parameters. This thesis presents a 4:1 "Split-TI" converter that achieves full convergence in less than 400,000 samples. The SAR architecture employs a binary weight capacitor array to convert analog inputs into digital output codes. Mismatch in the capacitor weights results in non-linear distortion error. By adding redundant bits and dividing the array into individual unit capacitors, the "Split-SAR" method can estimate the mismatch and correct the digital output code. The results from this work show a reduction in the non-linear distortion with the ability to converge in less than 750,000 samples.
Author: T. Michael Souders
Publisher:
ISBN:
Category : Analog-to-digital converters
Languages : en
Pages : 84
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Author: John Patrick Keane
Publisher:
ISBN:
Category :
Languages : en
Pages : 242
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Author: Xiaoyue Wang
Publisher:
ISBN:
Category :
Languages : en
Pages : 270
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Author: Shafiq M. Jamal
Publisher:
ISBN:
Category : Analog-to-digital converters
Languages : en
Pages : 262
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Author: Seung-Hoon Lee
Publisher:
ISBN:
Category :
Languages : en
Pages : 240
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Book Description
Flash-type analog-to-digital converters (ADCs) have been extensively used for high-speed applications such as high-performance TVs, image recognition, radar, and medical instrumentation. However, the linearity of these state-of-the-art flash-type ADCs has been limited to 10 bits by ratio mismatch of passive components. Although techniques such as laser-trimming, self-calibration and error-averaging have been developed to achieve high matching accuracy of components, they are not readily applied to flash-type ADCs. This thesis proposes a direct, digital code-error, calibration technique to improve the linearity of two-step flash ADCs. When implemented in MOS technologies, this technique eliminates other errors resulting from MOS switch feedthrough, op amp offsets, and interstage gain errors. Nonlinearities of ADCs are statistically simulated considering component mismatch and other nonideal factors. A test chip has been verified by ADICE and ISPLICE3 and implemented using a 2 $mu$m N-well CMOS technology from Analog Devices, Inc. Experimental results of the prototype show that the proposed calibration technique reduces total harmonic distortion from $-$64 dB to $-$77 dB and improves signal-to-noise ratio from 61 dB to 67 dB after calibration.
Author: Ozan Ersan Erdoğan
Publisher:
ISBN:
Category :
Languages : en
Pages : 250
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Book Description
Author: Bahar Jalali-Farahani
Publisher: Springer
ISBN: 9789400739703
Category : Technology & Engineering
Languages : en
Pages : 200
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Book Description
Digital Background Calibration of Analog to Digital Converters takes a deep look at the digital calibration techniques in analog-to-digital converters. The problem of compensating for analog circuits impairments is divided into a system identification problem and an error compensation problem. Different approaches in modelling the analog impairments are discussed. Although Digital Background Calibration of Analog to Digital Converters focuses on two popular types of ADCs mainly: Pipeline and Sigma Delta the techniques can be easily used for any analog and mixed-signal design. Design examples are provided that support the theory and show the application of these techniques in designing high performance data acquisitions systems for wireless communication systems, bio-implantable devices and space electronics.
Author: Manar El-Chammas
Publisher: Springer Science & Business Media
ISBN: 146141511X
Category : Technology & Engineering
Languages : en
Pages : 138
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Book Description
This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements. Readers will benefit from the presentation of a low-power solution that can be used in actual products, while alleviating the time-varying signal artifacts that typically arise when implementing such a system architecture.
