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Author: Qiaoyan Yu
Publisher: Springer Science & Business Media
ISBN: 1461409624
Category : Technology & Engineering
Languages : en
Pages : 166
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Book Description
This book addresses reliability and energy efficiency of on-chip networks using cooperative error control. It describes an efficient way to construct an adaptive error control codec capable of tracking noise conditions and adjusting the error correction strength at runtime. Methods are also presented to tackle joint transient and permanent error correction, exploiting the redundant resources already available on-chip. A parallel and flexible network simulator is also introduced, which facilitates examining the impact of various error control methods on network-on-chip performance.
Author: Qiaoyan Yu
Publisher: Springer Science & Business Media
ISBN: 1461409624
Category : Technology & Engineering
Languages : en
Pages : 166
Get Book Here
Book Description
This book addresses reliability and energy efficiency of on-chip networks using cooperative error control. It describes an efficient way to construct an adaptive error control codec capable of tracking noise conditions and adjusting the error correction strength at runtime. Methods are also presented to tackle joint transient and permanent error correction, exploiting the redundant resources already available on-chip. A parallel and flexible network simulator is also introduced, which facilitates examining the impact of various error control methods on network-on-chip performance.
Author: Wei Song
Publisher: CRC Press
ISBN: 1000578828
Category : Computers
Languages : en
Pages : 381
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Book Description
Asynchronous On-Chip Networks and Fault-Tolerant Techniques is the first comprehensive study of fault-tolerance and fault-caused deadlock effects in asynchronous on-chip networks, aiming to overcome these drawbacks and ensure greater reliability of applications. As a promising alternative to the widely used synchronous on-chip networks for multicore processors, asynchronous on-chip networks can be vulnerable to faults even if they can deliver the same performance with much lower energy and area compared with their synchronous counterparts – faults can not only corrupt data transmission but also cause a unique type of deadlock. By adopting a new redundant code along with a dynamic fault detection and recovery scheme, the authors demonstrate that asynchronous on-chip networks can be efficiently hardened to tolerate both transient and permanent faults and overcome fault-caused deadlocks. This book will serve as an essential guide for researchers and students studying interconnection networks, fault-tolerant computing, asynchronous system design, circuit design and on-chip networking, as well as for professionals interested in designing fault-tolerant and high-throughput asynchronous circuits.
Author: Érika Cota
Publisher: Springer Science & Business Media
ISBN: 1461407915
Category : Technology & Engineering
Languages : en
Pages : 220
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Book Description
This book presents an overview of the issues related to the test, diagnosis and fault-tolerance of Network on Chip-based systems. It is the first book dedicated to the quality aspects of NoC-based systems and will serve as an invaluable reference to the problems, challenges, solutions, and trade-offs related to designing and implementing state-of-the-art, on-chip communication architectures.
Author: Srinivasan Murali
Publisher: Springer Science & Business Media
ISBN: 1402097573
Category : Technology & Engineering
Languages : en
Pages : 200
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Book Description
Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge. With technology scaling, as the geometries of on-chip devices reach the physical limits of operation, another important design challenge for NoCs will be to provide dynamic (run-time) support against permanent and intermittent faults that can occur in the system. The purpose of Designing Reliable and Efficient Networks on Chips is to provide state-of-the-art methods to solve some of the most important and time-intensive problems encountered during NoC design.
Author: Springer
Publisher:
ISBN: 9781461409632
Category :
Languages : en
Pages : 172
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Book Description
Author: Chrysostomos Nicopoulos
Publisher: Springer Science & Business Media
ISBN: 904813031X
Category : Technology & Engineering
Languages : en
Pages : 237
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Book Description
[2]. The Cell Processor from Sony, Toshiba and IBM (STI) [3], and the Sun UltraSPARC T1 (formerly codenamed Niagara) [4] signal the growing popularity of such systems. Furthermore, Intel’s very recently announced 80-core TeraFLOP chip [5] exemplifies the irreversible march toward many-core systems with tens or even hundreds of processing elements. 1.2 The Dawn of the Communication-Centric Revolution The multi-core thrust has ushered the gradual displacement of the computati- centric design model by a more communication-centric approach [6]. The large, sophisticated monolithic modules are giving way to several smaller, simpler p- cessing elements working in tandem. This trend has led to a surge in the popularity of multi-core systems, which typically manifest themselves in two distinct incarnations: heterogeneous Multi-Processor Systems-on-Chip (MPSoC) and homogeneous Chip Multi-Processors (CMP). The SoC philosophy revolves around the technique of Platform-Based Design (PBD) [7], which advocates the reuse of Intellectual Property (IP) cores in flexible design templates that can be customized accordingly to satisfy the demands of particular implementations. The appeal of such a modular approach lies in the substantially reduced Time-To- Market (TTM) incubation period, which is a direct outcome of lower circuit complexity and reduced design effort. The whole system can now be viewed as a diverse collection of pre-existing IP components integrated on a single die.
Author: William James Dally
Publisher: Morgan Kaufmann
ISBN: 0122007514
Category : Computers
Languages : en
Pages : 582
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Book Description
This book offers a detailed and comprehensive presentation of the basic principles of interconnection network design clearly illustrating them with numerous examples and case studies. It incorporates hardware-level descriptions of concepts.
Author: Sergey Yurish
Publisher: Lulu.com
ISBN: 8469786334
Category : Technology & Engineering
Languages : en
Pages : 536
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Book Description
The 1st volume of 'Advances in Microelectronics: Reviews' Book Series contains 19 chapters written by 72 authors from academia and industry from 16 countries. With unique combination of information in each volume, the 'Advances in Microelectronics: Reviews' Book Series will be of value for scientists and engineers in industry and at universities. In order to offer a fast and easy reading of the state of the art of each topic, every chapter in this book is independent and self-contained. All chapters have the same structure: first an introduction to specific topic under study; second particular field description including sensing applications. Each of chapter is ending by well selected list of references with books, journals, conference proceedings and web sites. This book ensures that readers will stay at the cutting edge of the field and get the right and effective start point and road map for the further researches and developments.
Author: Amit Kumar Singh
Publisher: MDPI
ISBN: 3036508767
Category : Technology & Engineering
Languages : en
Pages : 218
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Book Description
The increasing demand of processing a higher number of applications and related data on computing platforms has resulted in reliance on multi-/many-core chips as they facilitate parallel processing. However, there is a desire for these platforms to be energy-efficient and reliable, and they need to perform secure computations for the interest of the whole community. This book provides perspectives on the aforementioned aspects from leading researchers in terms of state-of-the-art contributions and upcoming trends.
Author: Shen, Jih-Sheng
Publisher: IGI Global
ISBN: 1615208089
Category : Computers
Languages : en
Pages : 384
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Book Description
Reconfigurable computing brings immense flexibility to on-chip processing while network-on-chip has improved flexibility in on-chip communication. Integrating these two areas of research reaps the benefits of both and represents the promising future of multiprocessor systems-on-chip. This book is the one of the first compilations written to demonstrate this future for network-on-chip design. Through dynamic and creative research into questions ranging from integrating reconfigurable computing techniques, to task assigning, scheduling and arrival, to designing an operating system to take advantage of the computing and communication flexibilities brought about by run-time reconfiguration and network-on-chip, it represents a complete source of the techniques and applications for reconfigurable network-on-chip necessary for understanding of future of this field.
