Author: Larry M. Augustin
Publisher: Springer Science & Business Media
ISBN: 1461540429
Category : Technology & Engineering
Languages : en
Pages : 325
Book Description
The VHSIC Hardware Description Language (VHDL) provides a standard machine processable notation for describing hardware. VHDL is the result of a collaborative effort between IBM, Intermetrics, and Texas Instruments; sponsored by the Very High Speed Integrated Cir cuits (VHSIC) program office of the Department of Defense, beginning in 1981. Today it is an IEEE standard (1076-1987), and several simulators and other automated support tools for it are available commercially. By providing a standard notation for describing hardware, especially in the early stages of the hardware design process, VHDL is expected to reduce both the time lag and the cost involved in building new systems and upgrading existing ones. VHDL is the result of an evolutionary approach to language devel opment starting with high level hardware description languages existing in 1981. It has a decidedly programming language flavor, resulting both from the orientation of hardware languages of that time, and from a ma jor requirement that VHDL use Ada constructs wherever appropriate. During the 1980's there has been an increasing current of research into high level specification languages for systems, particularly in the software area, and new methods of utilizing specifications in systems de velopment. This activity is worldwide and includes, for example, object oriented design, various rigorous development methods, mathematical verification, and synthesis from high level specifications. VAL (VHDL Annotation Language) is a simple further step in the evolution of hardware description languages in the direction of applying new methods that have developed since VHDL was designed.
Hardware Design and Simulation in VAL/VHDL
Author: Larry M. Augustin
Publisher: Springer Science & Business Media
ISBN: 1461540429
Category : Technology & Engineering
Languages : en
Pages : 325
Book Description
The VHSIC Hardware Description Language (VHDL) provides a standard machine processable notation for describing hardware. VHDL is the result of a collaborative effort between IBM, Intermetrics, and Texas Instruments; sponsored by the Very High Speed Integrated Cir cuits (VHSIC) program office of the Department of Defense, beginning in 1981. Today it is an IEEE standard (1076-1987), and several simulators and other automated support tools for it are available commercially. By providing a standard notation for describing hardware, especially in the early stages of the hardware design process, VHDL is expected to reduce both the time lag and the cost involved in building new systems and upgrading existing ones. VHDL is the result of an evolutionary approach to language devel opment starting with high level hardware description languages existing in 1981. It has a decidedly programming language flavor, resulting both from the orientation of hardware languages of that time, and from a ma jor requirement that VHDL use Ada constructs wherever appropriate. During the 1980's there has been an increasing current of research into high level specification languages for systems, particularly in the software area, and new methods of utilizing specifications in systems de velopment. This activity is worldwide and includes, for example, object oriented design, various rigorous development methods, mathematical verification, and synthesis from high level specifications. VAL (VHDL Annotation Language) is a simple further step in the evolution of hardware description languages in the direction of applying new methods that have developed since VHDL was designed.
Publisher: Springer Science & Business Media
ISBN: 1461540429
Category : Technology & Engineering
Languages : en
Pages : 325
Book Description
The VHSIC Hardware Description Language (VHDL) provides a standard machine processable notation for describing hardware. VHDL is the result of a collaborative effort between IBM, Intermetrics, and Texas Instruments; sponsored by the Very High Speed Integrated Cir cuits (VHSIC) program office of the Department of Defense, beginning in 1981. Today it is an IEEE standard (1076-1987), and several simulators and other automated support tools for it are available commercially. By providing a standard notation for describing hardware, especially in the early stages of the hardware design process, VHDL is expected to reduce both the time lag and the cost involved in building new systems and upgrading existing ones. VHDL is the result of an evolutionary approach to language devel opment starting with high level hardware description languages existing in 1981. It has a decidedly programming language flavor, resulting both from the orientation of hardware languages of that time, and from a ma jor requirement that VHDL use Ada constructs wherever appropriate. During the 1980's there has been an increasing current of research into high level specification languages for systems, particularly in the software area, and new methods of utilizing specifications in systems de velopment. This activity is worldwide and includes, for example, object oriented design, various rigorous development methods, mathematical verification, and synthesis from high level specifications. VAL (VHDL Annotation Language) is a simple further step in the evolution of hardware description languages in the direction of applying new methods that have developed since VHDL was designed.
VHDL for Simulation, Synthesis and Formal Proofs of Hardware
Author: Jean Mermet
Publisher: Springer Science & Business Media
ISBN: 146153562X
Category : Computers
Languages : en
Pages : 303
Book Description
The success of VHDL since it has been balloted in 1987 as an IEEE standard may look incomprehensible to the large population of hardware designers, who had never heared of Hardware Description Languages before (for at least 90% of them), as well as to the few hundreds of specialists who had been working on these languages for a long time (25 years for some of them). Until 1988, only a very small subset of designers, in a few large companies, were used to describe their designs using a proprietary HDL, or sometimes a HDL inherited from a University when some software environment happened to be developped around it, allowing usability by third parties. A number of benefits were definitely recognized to this practice, such as functional verification of a specification through simulation, first performance evaluation of a tentative design, and sometimes automatic microprogram generation or even automatic high level synthesis. As there was apparently no market for HDL's, the ECAD vendors did not care about them, start-up companies were seldom able to survive in this area, and large users of proprietary tools were spending more and more people and money just to maintain their internal system.
Publisher: Springer Science & Business Media
ISBN: 146153562X
Category : Computers
Languages : en
Pages : 303
Book Description
The success of VHDL since it has been balloted in 1987 as an IEEE standard may look incomprehensible to the large population of hardware designers, who had never heared of Hardware Description Languages before (for at least 90% of them), as well as to the few hundreds of specialists who had been working on these languages for a long time (25 years for some of them). Until 1988, only a very small subset of designers, in a few large companies, were used to describe their designs using a proprietary HDL, or sometimes a HDL inherited from a University when some software environment happened to be developped around it, allowing usability by third parties. A number of benefits were definitely recognized to this practice, such as functional verification of a specification through simulation, first performance evaluation of a tentative design, and sometimes automatic microprogram generation or even automatic high level synthesis. As there was apparently no market for HDL's, the ECAD vendors did not care about them, start-up companies were seldom able to survive in this area, and large users of proprietary tools were spending more and more people and money just to maintain their internal system.
Hardware/Software Co-Design and Co-Verification
Author: Jean-Michel Bergé
Publisher: Springer Science & Business Media
ISBN: 1475726295
Category : Technology & Engineering
Languages : en
Pages : 178
Book Description
Co-Design is the set of emerging techniques which allows for the simultaneous design of Hardware and Software. In many cases where the application is very demanding in terms of various performances (time, surface, power consumption), trade-offs between dedicated hardware and dedicated software are becoming increasingly difficult to decide upon in the early stages of a design. Verification techniques - such as simulation or proof techniques - that have proven necessary in the hardware design must be dramatically adapted to the simultaneous verification of Software and Hardware. Describing the latest tools available for both Co-Design and Co-Verification of systems, Hardware/Software Co-Design and Co-Verification offers a complete look at this evolving set of procedures for CAD environments. The book considers all trade-offs that have to be made when co-designing a system. Several models are presented for determining the optimum solution to any co-design problem, including partitioning, architecture synthesis and code generation. When deciding on trade-offs, one of the main factors to be considered is the flow of communication, especially to and from the outside world. This involves the modeling of communication protocols. An approach to the synthesis of interface circuits in the context of co-design is presented. Other chapters present a co-design oriented flexible component data-base and retrieval methods; a case study of an ethernet bridge, designed using LOTOS and co-design methodologies and finally a programmable user interface based on monitors. Hardware/Software Co-Design and Co-Verification will help designers and researchers to understand these latest techniques in system design and as such will be of interest to all involved in embedded system design.
Publisher: Springer Science & Business Media
ISBN: 1475726295
Category : Technology & Engineering
Languages : en
Pages : 178
Book Description
Co-Design is the set of emerging techniques which allows for the simultaneous design of Hardware and Software. In many cases where the application is very demanding in terms of various performances (time, surface, power consumption), trade-offs between dedicated hardware and dedicated software are becoming increasingly difficult to decide upon in the early stages of a design. Verification techniques - such as simulation or proof techniques - that have proven necessary in the hardware design must be dramatically adapted to the simultaneous verification of Software and Hardware. Describing the latest tools available for both Co-Design and Co-Verification of systems, Hardware/Software Co-Design and Co-Verification offers a complete look at this evolving set of procedures for CAD environments. The book considers all trade-offs that have to be made when co-designing a system. Several models are presented for determining the optimum solution to any co-design problem, including partitioning, architecture synthesis and code generation. When deciding on trade-offs, one of the main factors to be considered is the flow of communication, especially to and from the outside world. This involves the modeling of communication protocols. An approach to the synthesis of interface circuits in the context of co-design is presented. Other chapters present a co-design oriented flexible component data-base and retrieval methods; a case study of an ethernet bridge, designed using LOTOS and co-design methodologies and finally a programmable user interface based on monitors. Hardware/Software Co-Design and Co-Verification will help designers and researchers to understand these latest techniques in system design and as such will be of interest to all involved in embedded system design.
VHDL Designer’s Reference
Author: Jean-Michel Bergé
Publisher: Springer Science & Business Media
ISBN: 1461534984
Category : Technology & Engineering
Languages : en
Pages : 469
Book Description
too vast, too complex, too grand ... for description. John Wesley Powell-1870 (discovering the Grand Canyon) VHDL is a big world. A beginner can be easily disappointed by the generality of this language. This generality is explained by the large number of domains covered - from specifications to logical simulation or synthesis. To the very beginner, VHDL appears as a "kit". He is quickly aware that his problem may be solved with VHDL, but does not know how. He does not even know how to start. In this state of mind, all the constraints that can be set to his modeling job, by using a subset of the language or a given design methodology, may be seen as a life preserver. The success of the introduction of VHDL in a company depends on solutions to many questions that should be answered months before the first line of code is written: • Why choose VHDL? • Which VHDL tools should be chosen? • Which modeling methodology should be adopted? • How should the VHDL environment be customized? • What are the tricks? Where are the traps? • What are the differences between VHDL and other competing HDLs? Answers to these questions are organized according to different concerns: buying the tools, organizing the environment, and designing. Decisions taken in each of these areas may have many consequences on the way to the acceptance and efficiently use of VHDL in a company.
Publisher: Springer Science & Business Media
ISBN: 1461534984
Category : Technology & Engineering
Languages : en
Pages : 469
Book Description
too vast, too complex, too grand ... for description. John Wesley Powell-1870 (discovering the Grand Canyon) VHDL is a big world. A beginner can be easily disappointed by the generality of this language. This generality is explained by the large number of domains covered - from specifications to logical simulation or synthesis. To the very beginner, VHDL appears as a "kit". He is quickly aware that his problem may be solved with VHDL, but does not know how. He does not even know how to start. In this state of mind, all the constraints that can be set to his modeling job, by using a subset of the language or a given design methodology, may be seen as a life preserver. The success of the introduction of VHDL in a company depends on solutions to many questions that should be answered months before the first line of code is written: • Why choose VHDL? • Which VHDL tools should be chosen? • Which modeling methodology should be adopted? • How should the VHDL environment be customized? • What are the tricks? Where are the traps? • What are the differences between VHDL and other competing HDLs? Answers to these questions are organized according to different concerns: buying the tools, organizing the environment, and designing. Decisions taken in each of these areas may have many consequences on the way to the acceptance and efficiently use of VHDL in a company.
Hardware Annealing in Analog VLSI Neurocomputing
Author: Bank W. Lee
Publisher: Springer Science & Business Media
ISBN: 1461539846
Category : Technology & Engineering
Languages : en
Pages : 251
Book Description
Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips.
Publisher: Springer Science & Business Media
ISBN: 1461539846
Category : Technology & Engineering
Languages : en
Pages : 251
Book Description
Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips.
VHDL’92
Author: Jean-Michel Bergé
Publisher: Springer Science & Business Media
ISBN: 1461532469
Category : Technology & Engineering
Languages : en
Pages : 206
Book Description
An open process of restandardization, conducted by the IEEE, has led to the definitions of the new VHDL standard. The changes make VHDL safer, more portable, and more powerful. VHDL also becomes bigger and more complete. The canonical simulator of VHDL is enriched by new mechanisms, the predefined environment is more complete, and the syntax is more regular and flexible. Discrepancies and known bugs of VHDL'87 have been fixed. However, the new VHDL'92 is compatible with VHDL'87, with some minor exceptions. This book presents the new VHDL'92 for the VHDL designer. New features ar explained and classified. Examples are provided, each new feature is given a rationale and its impact on design methodology, and performance is analysed. Where appropriate, pitfalls and traps are explained. The VHDL designer will quickly be able to find the feature needed to evaluate the benefits it brings, to modify previous VHDL'87 code to make it more efficient, more portable, and more flexible. VHDL'92 is the essential update for all VHDL designers and managers involved in electronic design.
Publisher: Springer Science & Business Media
ISBN: 1461532469
Category : Technology & Engineering
Languages : en
Pages : 206
Book Description
An open process of restandardization, conducted by the IEEE, has led to the definitions of the new VHDL standard. The changes make VHDL safer, more portable, and more powerful. VHDL also becomes bigger and more complete. The canonical simulator of VHDL is enriched by new mechanisms, the predefined environment is more complete, and the syntax is more regular and flexible. Discrepancies and known bugs of VHDL'87 have been fixed. However, the new VHDL'92 is compatible with VHDL'87, with some minor exceptions. This book presents the new VHDL'92 for the VHDL designer. New features ar explained and classified. Examples are provided, each new feature is given a rationale and its impact on design methodology, and performance is analysed. Where appropriate, pitfalls and traps are explained. The VHDL designer will quickly be able to find the feature needed to evaluate the benefits it brings, to modify previous VHDL'87 code to make it more efficient, more portable, and more flexible. VHDL'92 is the essential update for all VHDL designers and managers involved in electronic design.
High-Level System Modeling
Author: Ronald Waxman
Publisher: Springer Science & Business Media
ISBN: 1461313090
Category : Computers
Languages : en
Pages : 206
Book Description
In system design, generation of high-level abstract models that can be closely associated with evolving lower-level models provides designers with the ability to incrementally `test' an evolving design against a model of a specification. Such high-level models may deal with areas such as performance, reliability, availability, maintainability, and system safety. Abstract models also allow exploration of the hardware versus software design space in an incremental fashion as a fuller, detailed design unfolds, leaving behind the old practice of hardware-software binding too early in the design process. Such models may also allow the inclusion of non-functional aspects of design (e.g. space, power, heat) in a simulatable information model dealing with the system's operation. This book addresses Model Generation and Application specifically in the following domains: Specification modeling (linking object/data modeling, behavior modeling, and activity modeling). Operational specification modeling (modeling the way the system is supposed to operate - from a user's viewpoint). Linking non-functional parameters with specification models. Hybrid modeling (linking performance and functional elements). Application of high-level modeling to hardware/software approaches. Mathematical analysis techniques related to the modeling approaches. Reliability modeling. Applications of High Level Modeling. Reducing High Level Modeling to Practice. High-Level System Modeling: Specification and Design Methodologies describes the latest research and practice in the modeling of electronic systems and as such is an important update for all researchers, design engineers and technical managers working in design automation and circuit design.
Publisher: Springer Science & Business Media
ISBN: 1461313090
Category : Computers
Languages : en
Pages : 206
Book Description
In system design, generation of high-level abstract models that can be closely associated with evolving lower-level models provides designers with the ability to incrementally `test' an evolving design against a model of a specification. Such high-level models may deal with areas such as performance, reliability, availability, maintainability, and system safety. Abstract models also allow exploration of the hardware versus software design space in an incremental fashion as a fuller, detailed design unfolds, leaving behind the old practice of hardware-software binding too early in the design process. Such models may also allow the inclusion of non-functional aspects of design (e.g. space, power, heat) in a simulatable information model dealing with the system's operation. This book addresses Model Generation and Application specifically in the following domains: Specification modeling (linking object/data modeling, behavior modeling, and activity modeling). Operational specification modeling (modeling the way the system is supposed to operate - from a user's viewpoint). Linking non-functional parameters with specification models. Hybrid modeling (linking performance and functional elements). Application of high-level modeling to hardware/software approaches. Mathematical analysis techniques related to the modeling approaches. Reliability modeling. Applications of High Level Modeling. Reducing High Level Modeling to Practice. High-Level System Modeling: Specification and Design Methodologies describes the latest research and practice in the modeling of electronic systems and as such is an important update for all researchers, design engineers and technical managers working in design automation and circuit design.
Formal Semantics for VHDL
Author: Carlos Delgado Kloos
Publisher: Springer Science & Business Media
ISBN: 1461522374
Category : Technology & Engineering
Languages : en
Pages : 263
Book Description
It is recognized that formal design and verification methods are an important requirement for the attainment of high quality system designs. The field has evolved enormously during the last few years, resulting in the fact that formal design and verification methods are nowadays supported by several tools, both commercial and academic. If different tools and users are to generate and read the same language then it is necessary that the same semantics is assigned by them to all constructs and elements of the language. The current IEEE standard VHDL language reference manual (LRM) tries to define VHDL as well as possible in a descriptive way, explaining the semantics in English. But rigor and clarity are very hard to maintain in a semantics defined in this way, and that has already given rise to many misconceptions and contradictory interpretations. Formal Semantics for VHDL is the first book that puts forward a cohesive set of semantics for the VHDL language. The chapters describe several semantics each based on a different underlying formalism: two of them use Petri nets as target language, and two of them higher order logic. Two use functional concepts, and finally another uses the concept of evolving algebras. Formal Semantics for VHDL is essential reading for researchers in formal methods and can be used as a text for an advanced course on the subject.
Publisher: Springer Science & Business Media
ISBN: 1461522374
Category : Technology & Engineering
Languages : en
Pages : 263
Book Description
It is recognized that formal design and verification methods are an important requirement for the attainment of high quality system designs. The field has evolved enormously during the last few years, resulting in the fact that formal design and verification methods are nowadays supported by several tools, both commercial and academic. If different tools and users are to generate and read the same language then it is necessary that the same semantics is assigned by them to all constructs and elements of the language. The current IEEE standard VHDL language reference manual (LRM) tries to define VHDL as well as possible in a descriptive way, explaining the semantics in English. But rigor and clarity are very hard to maintain in a semantics defined in this way, and that has already given rise to many misconceptions and contradictory interpretations. Formal Semantics for VHDL is the first book that puts forward a cohesive set of semantics for the VHDL language. The chapters describe several semantics each based on a different underlying formalism: two of them use Petri nets as target language, and two of them higher order logic. Two use functional concepts, and finally another uses the concept of evolving algebras. Formal Semantics for VHDL is essential reading for researchers in formal methods and can be used as a text for an advanced course on the subject.
Monte Carlo Device Simulation
Author: Karl Hess
Publisher: Springer Science & Business Media
ISBN: 1461540267
Category : Technology & Engineering
Languages : en
Pages : 317
Book Description
Monte Carlo simulation is now a well established method for studying semiconductor devices and is particularly well suited to highlighting physical mechanisms and exploring material properties. Not surprisingly, the more completely the material properties are built into the simulation, up to and including the use of a full band structure, the more powerful is the method. Indeed, it is now becoming increasingly clear that phenomena such as reliabil ity related hot-electron effects in MOSFETs cannot be understood satisfac torily without using full band Monte Carlo. The IBM simulator DAMOCLES, therefore, represents a landmark of great significance. DAMOCLES sums up the total of Monte Carlo device modeling experience of the past, and reaches with its capabilities and opportunities into the distant future. This book, therefore, begins with a description of the IBM simulator. The second chapter gives an advanced introduction to the physical basis for Monte Carlo simulations and an outlook on why complex effects such as collisional broadening and intracollisional field effects can be important and how they can be included in the simulations. References to more basic intro the book. The third chapter ductory material can be found throughout describes a typical relationship of Monte Carlo simulations to experimental data and indicates a major difficulty, the vast number of deformation poten tials required to simulate transport throughout the entire Brillouin zone. The fourth chapter addresses possible further extensions of the Monte Carlo approach and subtleties of the electron-electron interaction.
Publisher: Springer Science & Business Media
ISBN: 1461540267
Category : Technology & Engineering
Languages : en
Pages : 317
Book Description
Monte Carlo simulation is now a well established method for studying semiconductor devices and is particularly well suited to highlighting physical mechanisms and exploring material properties. Not surprisingly, the more completely the material properties are built into the simulation, up to and including the use of a full band structure, the more powerful is the method. Indeed, it is now becoming increasingly clear that phenomena such as reliabil ity related hot-electron effects in MOSFETs cannot be understood satisfac torily without using full band Monte Carlo. The IBM simulator DAMOCLES, therefore, represents a landmark of great significance. DAMOCLES sums up the total of Monte Carlo device modeling experience of the past, and reaches with its capabilities and opportunities into the distant future. This book, therefore, begins with a description of the IBM simulator. The second chapter gives an advanced introduction to the physical basis for Monte Carlo simulations and an outlook on why complex effects such as collisional broadening and intracollisional field effects can be important and how they can be included in the simulations. References to more basic intro the book. The third chapter ductory material can be found throughout describes a typical relationship of Monte Carlo simulations to experimental data and indicates a major difficulty, the vast number of deformation poten tials required to simulate transport throughout the entire Brillouin zone. The fourth chapter addresses possible further extensions of the Monte Carlo approach and subtleties of the electron-electron interaction.
High-Level VLSI Synthesis
Author: Raul Camposano
Publisher: Springer Science & Business Media
ISBN: 1461539668
Category : Technology & Engineering
Languages : en
Pages : 395
Book Description
The time has come for high-level synthesis. When research into synthesizing hardware from abstract, program-like de scriptions started in the early 1970' s, there was no automated path from the register transfer design produced by high-level synthesis to a complete hardware imple mentation. As a result, it was very difficult to measure the effectiveness of high level synthesis methods; it was also hard to justify to users the need to automate architecture design when low-level design had to be completed manually. Today's more mature CAD techniques help close the gap between an automat ically synthesized design and a manufacturable design. Market pressures encour age designers to make use of any and all automated tools. Layout synthesis, logic synthesis, and specialized datapath generators make it feasible to quickly imple ment a register-transfer design in silicon,leaving designers more time to consider architectural improvements. As IC design becomes more automated, customers are increasing their demands; today's leading edge designers using logic synthesis systems are training themselves to be tomorrow's consumers of high-level synthe sis systems. The need for very fast turnaround, a competitive fabrication market WhlCh makes small-quantity ASIC manufacturing possible, and the ever growing co:n plexity of the systems being designed, all make higher-level design automaton inevitable.
Publisher: Springer Science & Business Media
ISBN: 1461539668
Category : Technology & Engineering
Languages : en
Pages : 395
Book Description
The time has come for high-level synthesis. When research into synthesizing hardware from abstract, program-like de scriptions started in the early 1970' s, there was no automated path from the register transfer design produced by high-level synthesis to a complete hardware imple mentation. As a result, it was very difficult to measure the effectiveness of high level synthesis methods; it was also hard to justify to users the need to automate architecture design when low-level design had to be completed manually. Today's more mature CAD techniques help close the gap between an automat ically synthesized design and a manufacturable design. Market pressures encour age designers to make use of any and all automated tools. Layout synthesis, logic synthesis, and specialized datapath generators make it feasible to quickly imple ment a register-transfer design in silicon,leaving designers more time to consider architectural improvements. As IC design becomes more automated, customers are increasing their demands; today's leading edge designers using logic synthesis systems are training themselves to be tomorrow's consumers of high-level synthe sis systems. The need for very fast turnaround, a competitive fabrication market WhlCh makes small-quantity ASIC manufacturing possible, and the ever growing co:n plexity of the systems being designed, all make higher-level design automaton inevitable.