Author: Sunil P Khatri
Publisher: Springer Science & Business Media
ISBN: 1441909443
Category : Technology & Engineering
Languages : en
Pages : 207
Book Description
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs.
Hardware Acceleration of EDA Algorithms
Author: Sunil P Khatri
Publisher: Springer Science & Business Media
ISBN: 1441909443
Category : Technology & Engineering
Languages : en
Pages : 207
Book Description
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs.
Publisher: Springer Science & Business Media
ISBN: 1441909443
Category : Technology & Engineering
Languages : en
Pages : 207
Book Description
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs.
Soft Error Reliability of VLSI Circuits
Author: Behnam Ghavami
Publisher: Springer Nature
ISBN: 3030516105
Category : Technology & Engineering
Languages : en
Pages : 114
Book Description
This book is intended for readers who are interested in the design of robust and reliable electronic digital systems. The authors cover emerging trends in design of today’s reliable electronic systems which are applicable to safety-critical applications, such as automotive or healthcare electronic systems. The emphasis is on modeling approaches and algorithms for analysis and mitigation of soft errors in nano-scale CMOS digital circuits, using techniques that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. The authors introduce software tools for analysis and mitigation of soft errors in electronic systems, which can be integrated easily with design flows. In addition to discussing soft error aware analysis techniques for combinational logic, the authors also describe new soft error mitigation strategies targeting commercial digital circuits. Coverage includes novel Soft Error Rate (SER) analysis techniques such as process variation aware SER estimation and GPU accelerated SER analysis techniques, in addition to SER reduction methods such as gate sizing and logic restructuring based SER techniques.
Publisher: Springer Nature
ISBN: 3030516105
Category : Technology & Engineering
Languages : en
Pages : 114
Book Description
This book is intended for readers who are interested in the design of robust and reliable electronic digital systems. The authors cover emerging trends in design of today’s reliable electronic systems which are applicable to safety-critical applications, such as automotive or healthcare electronic systems. The emphasis is on modeling approaches and algorithms for analysis and mitigation of soft errors in nano-scale CMOS digital circuits, using techniques that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. The authors introduce software tools for analysis and mitigation of soft errors in electronic systems, which can be integrated easily with design flows. In addition to discussing soft error aware analysis techniques for combinational logic, the authors also describe new soft error mitigation strategies targeting commercial digital circuits. Coverage includes novel Soft Error Rate (SER) analysis techniques such as process variation aware SER estimation and GPU accelerated SER analysis techniques, in addition to SER reduction methods such as gate sizing and logic restructuring based SER techniques.
Context-Aware Systems and Applications
Author: Phan Cong Vinh
Publisher: Springer
ISBN: 3319292366
Category : Computers
Languages : en
Pages : 463
Book Description
This book constitutes the thoroughly refereed proceedings of the 4th International Conference on Context-Aware Systems and Applications, ICCASA 2015, held in Vung Tau, Vietnam, in November 2015. The 44 revised full papers presented were carefully selected and reviewed from over 100 submissions. The papers cover a wide spectrum of issues in the area of context-aware systems (CAS) and context-based recommendation systems. CAS is characterized by its self- facets such as self-organization, self-configuration, self-healing, self-optimization, self-protection and so on whose context awareness used to dynamically control computing and networking functions. The overall goal of CAS is to realize nature-inspired autonomic systems that can manage themselves without direct human interventions.
Publisher: Springer
ISBN: 3319292366
Category : Computers
Languages : en
Pages : 463
Book Description
This book constitutes the thoroughly refereed proceedings of the 4th International Conference on Context-Aware Systems and Applications, ICCASA 2015, held in Vung Tau, Vietnam, in November 2015. The 44 revised full papers presented were carefully selected and reviewed from over 100 submissions. The papers cover a wide spectrum of issues in the area of context-aware systems (CAS) and context-based recommendation systems. CAS is characterized by its self- facets such as self-organization, self-configuration, self-healing, self-optimization, self-protection and so on whose context awareness used to dynamically control computing and networking functions. The overall goal of CAS is to realize nature-inspired autonomic systems that can manage themselves without direct human interventions.
A Short History of Circuits and Systems
Author: Franco Maloberti
Publisher: CRC Press
ISBN: 1000794350
Category : Technology & Engineering
Languages : en
Pages : 343
Book Description
After an overview of major scientific discoveries of the 18th and 19th centuries, which created electrical science as we know and understand it and led to its useful applications in energy conversion, transmission, manufacturing industry and communications, this Circuits and Systems History book fills a gap in published literature by providing a record of the many outstanding scientists, mathematicians and engineers who laid the foundations of Circuit Theory and Filter Design from the mid-20th Century. Additionally, the book records the history of the IEEE Circuits and Systems Society from its origins as the small Circuit Theory Group of the Institute of Radio Engineers (IRE), which merged with the American Institute of Electrical Engineers (AIEE) to form IEEE in 1963, to the large and broad-coverage worldwide IEEE Society which it is today.Many authors from many countries contributed to the creation of this book, working to a very tight time-schedule. The result is a substantial contribution to their enthusiasm and expertise which it is hoped that readers will find both interesting and useful. It is sure that in such a book omissions will be found and in the space and time available, much valuable material had to be left out. It is hoped that this book will stimulate an interest in the marvellous heritage and contributions that have come from the many outstanding people who worked in the Circuits and Systems area.
Publisher: CRC Press
ISBN: 1000794350
Category : Technology & Engineering
Languages : en
Pages : 343
Book Description
After an overview of major scientific discoveries of the 18th and 19th centuries, which created electrical science as we know and understand it and led to its useful applications in energy conversion, transmission, manufacturing industry and communications, this Circuits and Systems History book fills a gap in published literature by providing a record of the many outstanding scientists, mathematicians and engineers who laid the foundations of Circuit Theory and Filter Design from the mid-20th Century. Additionally, the book records the history of the IEEE Circuits and Systems Society from its origins as the small Circuit Theory Group of the Institute of Radio Engineers (IRE), which merged with the American Institute of Electrical Engineers (AIEE) to form IEEE in 1963, to the large and broad-coverage worldwide IEEE Society which it is today.Many authors from many countries contributed to the creation of this book, working to a very tight time-schedule. The result is a substantial contribution to their enthusiasm and expertise which it is hoped that readers will find both interesting and useful. It is sure that in such a book omissions will be found and in the space and time available, much valuable material had to be left out. It is hoped that this book will stimulate an interest in the marvellous heritage and contributions that have come from the many outstanding people who worked in the Circuits and Systems area.
SVA: The Power of Assertions in SystemVerilog
Author: Eduard Cerny
Publisher: Springer
ISBN: 3319071394
Category : Technology & Engineering
Languages : en
Pages : 589
Book Description
This book is a comprehensive guide to assertion-based verification of hardware designs using System Verilog Assertions (SVA). It enables readers to minimize the cost of verification by using assertion-based techniques in simulation testing, coverage collection and formal analysis. The book provides detailed descriptions of all the language features of SVA, accompanied by step-by-step examples of how to employ them to construct powerful and reusable sets of properties. The book also shows how SVA fits into the broader System Verilog language, demonstrating the ways that assertions can interact with other System Verilog components. The reader new to hardware verification will benefit from general material describing the nature of design models and behaviors, how they are exercised, and the different roles that assertions play. This second edition covers the features introduced by the recent IEEE 1800-2012. System Verilog standard, explaining in detail the new and enhanced assertion constructs. The book makes SVA usable and accessible for hardware designers, verification engineers, formal verification specialists and EDA tool developers. With numerous exercises, ranging in depth and difficulty, the book is also suitable as a text for students.
Publisher: Springer
ISBN: 3319071394
Category : Technology & Engineering
Languages : en
Pages : 589
Book Description
This book is a comprehensive guide to assertion-based verification of hardware designs using System Verilog Assertions (SVA). It enables readers to minimize the cost of verification by using assertion-based techniques in simulation testing, coverage collection and formal analysis. The book provides detailed descriptions of all the language features of SVA, accompanied by step-by-step examples of how to employ them to construct powerful and reusable sets of properties. The book also shows how SVA fits into the broader System Verilog language, demonstrating the ways that assertions can interact with other System Verilog components. The reader new to hardware verification will benefit from general material describing the nature of design models and behaviors, how they are exercised, and the different roles that assertions play. This second edition covers the features introduced by the recent IEEE 1800-2012. System Verilog standard, explaining in detail the new and enhanced assertion constructs. The book makes SVA usable and accessible for hardware designers, verification engineers, formal verification specialists and EDA tool developers. With numerous exercises, ranging in depth and difficulty, the book is also suitable as a text for students.
Simulated Evolution and Learning
Author: Yuhui Shi
Publisher: Springer
ISBN: 331968759X
Category : Computers
Languages : en
Pages : 1048
Book Description
This book constitutes the refereed proceedings of the 11th International Conference on Simulated Evolution and Learning, SEAL 2017, held in Shenzhen, China, in November 2017. The 85 papers presented in this volume were carefully reviewed and selected from 145 submissions. They were organized in topical sections named: evolutionary optimisation; evolutionary multiobjective optimisation; evolutionary machine learning; theoretical developments; feature selection and dimensionality reduction; dynamic and uncertain environments; real-world applications; adaptive systems; and swarm intelligence.
Publisher: Springer
ISBN: 331968759X
Category : Computers
Languages : en
Pages : 1048
Book Description
This book constitutes the refereed proceedings of the 11th International Conference on Simulated Evolution and Learning, SEAL 2017, held in Shenzhen, China, in November 2017. The 85 papers presented in this volume were carefully reviewed and selected from 145 submissions. They were organized in topical sections named: evolutionary optimisation; evolutionary multiobjective optimisation; evolutionary machine learning; theoretical developments; feature selection and dimensionality reduction; dynamic and uncertain environments; real-world applications; adaptive systems; and swarm intelligence.
FPGA-BASED Hardware Accelerators
Author: Iouliia Skliarova
Publisher: Springer
ISBN: 3030207218
Category : Technology & Engineering
Languages : en
Pages : 257
Book Description
This book suggests and describes a number of fast parallel circuits for data/vector processing using FPGA-based hardware accelerators. Three primary areas are covered: searching, sorting, and counting in combinational and iterative networks. These include the application of traditional structures that rely on comparators/swappers as well as alternative networks with a variety of core elements such as adders, logical gates, and look-up tables. The iterative technique discussed in the book enables the sequential reuse of relatively large combinational blocks that execute many parallel operations with small propagation delays. For each type of network discussed, the main focus is on the step-by-step development of the architectures proposed from initial concepts to synthesizable hardware description language specifications. Each type of network is taken through several stages, including modeling the desired functionality in software, the retrieval and automatic conversion of key functions, leading to specifications for optimized hardware modules. The resulting specifications are then synthesized, implemented, and tested in FPGAs using commercial design environments and prototyping boards. The methods proposed can be used in a range of data processing applications, including traditional sorting, the extraction of maximum and minimum subsets from large data sets, communication-time data processing, finding frequently occurring items in a set, and Hamming weight/distance counters/comparators. The book is intended to be a valuable support material for university and industrial engineering courses that involve FPGA-based circuit and system design.
Publisher: Springer
ISBN: 3030207218
Category : Technology & Engineering
Languages : en
Pages : 257
Book Description
This book suggests and describes a number of fast parallel circuits for data/vector processing using FPGA-based hardware accelerators. Three primary areas are covered: searching, sorting, and counting in combinational and iterative networks. These include the application of traditional structures that rely on comparators/swappers as well as alternative networks with a variety of core elements such as adders, logical gates, and look-up tables. The iterative technique discussed in the book enables the sequential reuse of relatively large combinational blocks that execute many parallel operations with small propagation delays. For each type of network discussed, the main focus is on the step-by-step development of the architectures proposed from initial concepts to synthesizable hardware description language specifications. Each type of network is taken through several stages, including modeling the desired functionality in software, the retrieval and automatic conversion of key functions, leading to specifications for optimized hardware modules. The resulting specifications are then synthesized, implemented, and tested in FPGAs using commercial design environments and prototyping boards. The methods proposed can be used in a range of data processing applications, including traditional sorting, the extraction of maximum and minimum subsets from large data sets, communication-time data processing, finding frequently occurring items in a set, and Hamming weight/distance counters/comparators. The book is intended to be a valuable support material for university and industrial engineering courses that involve FPGA-based circuit and system design.
Algorithms and Solutions Based on Computer Technology
Author: Carlos Jahn
Publisher: Springer Nature
ISBN: 3030938727
Category : Computers
Languages : en
Pages : 393
Book Description
This book is a collection of papers compiled from the conference "Algorithms and Computer-Based Solutions" held on June 8-9, 2021 at Peter the Great St. Petersburg Polytechnic University (SPbPU), St. Petersburg, Russia. The authors of the book are leading scientists from Russia, Germany, Netherlands, Greece, Hungary, Kazakhstan, Portugal, and Poland. The reader finds in the book information from experts on the most interesting trends in digitalization - issues of development and implementation of algorithms, IT and digital solutions for various areas of economy and science, prospects for supercomputers and exo-intelligent platforms; applied computer technologies in digital production, healthcare and biomedical systems, digital medicine, logistics and management; digital technologies for visualization and prototyping of physical objects. The book helps the reader to increase his or her expertise in the field of computer technologies discussed.
Publisher: Springer Nature
ISBN: 3030938727
Category : Computers
Languages : en
Pages : 393
Book Description
This book is a collection of papers compiled from the conference "Algorithms and Computer-Based Solutions" held on June 8-9, 2021 at Peter the Great St. Petersburg Polytechnic University (SPbPU), St. Petersburg, Russia. The authors of the book are leading scientists from Russia, Germany, Netherlands, Greece, Hungary, Kazakhstan, Portugal, and Poland. The reader finds in the book information from experts on the most interesting trends in digitalization - issues of development and implementation of algorithms, IT and digital solutions for various areas of economy and science, prospects for supercomputers and exo-intelligent platforms; applied computer technologies in digital production, healthcare and biomedical systems, digital medicine, logistics and management; digital technologies for visualization and prototyping of physical objects. The book helps the reader to increase his or her expertise in the field of computer technologies discussed.
High Performance Computing for Big Data
Author: Chao Wang
Publisher: CRC Press
ISBN: 1498784003
Category : Computers
Languages : en
Pages : 287
Book Description
High-Performance Computing for Big Data: Methodologies and Applications explores emerging high-performance architectures for data-intensive applications, novel efficient analytical strategies to boost data processing, and cutting-edge applications in diverse fields, such as machine learning, life science, neural networks, and neuromorphic engineering. The book is organized into two main sections. The first section covers Big Data architectures, including cloud computing systems, and heterogeneous accelerators. It also covers emerging 3D IC design principles for memory architectures and devices. The second section of the book illustrates emerging and practical applications of Big Data across several domains, including bioinformatics, deep learning, and neuromorphic engineering. Features Covers a wide range of Big Data architectures, including distributed systems like Hadoop/Spark Includes accelerator-based approaches for big data applications such as GPU-based acceleration techniques, and hardware acceleration such as FPGA/CGRA/ASICs Presents emerging memory architectures and devices such as NVM, STT- RAM, 3D IC design principles Describes advanced algorithms for different big data application domains Illustrates novel analytics techniques for Big Data applications, scheduling, mapping, and partitioning methodologies Featuring contributions from leading experts, this book presents state-of-the-art research on the methodologies and applications of high-performance computing for big data applications. About the Editor Dr. Chao Wang is an Associate Professor in the School of Computer Science at the University of Science and Technology of China. He is the Associate Editor of ACM Transactions on Design Automations for Electronics Systems (TODAES), Applied Soft Computing, Microprocessors and Microsystems, IET Computers & Digital Techniques, and International Journal of Electronics. Dr. Chao Wang was the recipient of Youth Innovation Promotion Association, CAS, ACM China Rising Star Honorable Mention (2016), and best IP nomination of DATE 2015. He is now on the CCF Technical Committee on Computer Architecture, CCF Task Force on Formal Methods. He is a Senior Member of IEEE, Senior Member of CCF, and a Senior Member of ACM.
Publisher: CRC Press
ISBN: 1498784003
Category : Computers
Languages : en
Pages : 287
Book Description
High-Performance Computing for Big Data: Methodologies and Applications explores emerging high-performance architectures for data-intensive applications, novel efficient analytical strategies to boost data processing, and cutting-edge applications in diverse fields, such as machine learning, life science, neural networks, and neuromorphic engineering. The book is organized into two main sections. The first section covers Big Data architectures, including cloud computing systems, and heterogeneous accelerators. It also covers emerging 3D IC design principles for memory architectures and devices. The second section of the book illustrates emerging and practical applications of Big Data across several domains, including bioinformatics, deep learning, and neuromorphic engineering. Features Covers a wide range of Big Data architectures, including distributed systems like Hadoop/Spark Includes accelerator-based approaches for big data applications such as GPU-based acceleration techniques, and hardware acceleration such as FPGA/CGRA/ASICs Presents emerging memory architectures and devices such as NVM, STT- RAM, 3D IC design principles Describes advanced algorithms for different big data application domains Illustrates novel analytics techniques for Big Data applications, scheduling, mapping, and partitioning methodologies Featuring contributions from leading experts, this book presents state-of-the-art research on the methodologies and applications of high-performance computing for big data applications. About the Editor Dr. Chao Wang is an Associate Professor in the School of Computer Science at the University of Science and Technology of China. He is the Associate Editor of ACM Transactions on Design Automations for Electronics Systems (TODAES), Applied Soft Computing, Microprocessors and Microsystems, IET Computers & Digital Techniques, and International Journal of Electronics. Dr. Chao Wang was the recipient of Youth Innovation Promotion Association, CAS, ACM China Rising Star Honorable Mention (2016), and best IP nomination of DATE 2015. He is now on the CCF Technical Committee on Computer Architecture, CCF Task Force on Formal Methods. He is a Senior Member of IEEE, Senior Member of CCF, and a Senior Member of ACM.
Emerging Technology and Architecture for Big-data Analytics
Author: Anupam Chattopadhyay
Publisher: Springer
ISBN: 3319548409
Category : Technology & Engineering
Languages : en
Pages : 332
Book Description
This book describes the current state of the art in big-data analytics, from a technology and hardware architecture perspective. The presentation is designed to be accessible to a broad audience, with general knowledge of hardware design and some interest in big-data analytics. Coverage includes emerging technology and devices for data-analytics, circuit design for data-analytics, and architecture and algorithms to support data-analytics. Readers will benefit from the realistic context used by the authors, which demonstrates what works, what doesn’t work, and what are the fundamental problems, solutions, upcoming challenges and opportunities. Provides a single-source reference to hardware architectures for big-data analytics; Covers various levels of big-data analytics hardware design abstraction and flow, from device, to circuits and systems; Demonstrates how non-volatile memory (NVM) based hardware platforms can be a viable solution to existing challenges in hardware architecture for big-data analytics.
Publisher: Springer
ISBN: 3319548409
Category : Technology & Engineering
Languages : en
Pages : 332
Book Description
This book describes the current state of the art in big-data analytics, from a technology and hardware architecture perspective. The presentation is designed to be accessible to a broad audience, with general knowledge of hardware design and some interest in big-data analytics. Coverage includes emerging technology and devices for data-analytics, circuit design for data-analytics, and architecture and algorithms to support data-analytics. Readers will benefit from the realistic context used by the authors, which demonstrates what works, what doesn’t work, and what are the fundamental problems, solutions, upcoming challenges and opportunities. Provides a single-source reference to hardware architectures for big-data analytics; Covers various levels of big-data analytics hardware design abstraction and flow, from device, to circuits and systems; Demonstrates how non-volatile memory (NVM) based hardware platforms can be a viable solution to existing challenges in hardware architecture for big-data analytics.