Gate Stack and Silicide Issues in Silicon Processing:

Gate Stack and Silicide Issues in Silicon Processing: PDF Author: L. A. Clevenger
Publisher: Cambridge University Press
ISBN: 9781107413160
Category : Technology & Engineering
Languages : en
Pages : 254

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Book Description
As the feature size of microelectronic devices approaches the deep submicron regime, the process development and integration issues related to gate stack and silicide processing are key challenges. Gate leakage is rising due to direct tunneling. Power and reliability concerns are expected to limit the ultimate scaling of SiO2-based insulators to about 1.5nm. Gate insulators must not deleteriously affect the interface quality, thermal stability, charge trapping, or process integration. Metal gate materials and damascene gates are being investigated, in conjunction with the application of a high-permittivity gate insulator, to provide sufficient device performance at ULSI dimensions. The silicidation process is also coming under pressure. Narrow device widths and decreasing junction depths are making the formation of low-leakage, low-resistance silicide straps extremely difficult. Producing shallower junctions via ion implantation is inhibited by transient enhanced diffusion and low beam currents at low implantation energies. Gate stack and contact film effects, such as point defect injection, extended defect formation, and stress on ultrashallow junction formation must be considered.

Gate Stack and Silicide Issues in Silicon Processing:

Gate Stack and Silicide Issues in Silicon Processing: PDF Author: L. A. Clevenger
Publisher: Cambridge University Press
ISBN: 9781107413160
Category : Technology & Engineering
Languages : en
Pages : 254

Get Book Here

Book Description
As the feature size of microelectronic devices approaches the deep submicron regime, the process development and integration issues related to gate stack and silicide processing are key challenges. Gate leakage is rising due to direct tunneling. Power and reliability concerns are expected to limit the ultimate scaling of SiO2-based insulators to about 1.5nm. Gate insulators must not deleteriously affect the interface quality, thermal stability, charge trapping, or process integration. Metal gate materials and damascene gates are being investigated, in conjunction with the application of a high-permittivity gate insulator, to provide sufficient device performance at ULSI dimensions. The silicidation process is also coming under pressure. Narrow device widths and decreasing junction depths are making the formation of low-leakage, low-resistance silicide straps extremely difficult. Producing shallower junctions via ion implantation is inhibited by transient enhanced diffusion and low beam currents at low implantation energies. Gate stack and contact film effects, such as point defect injection, extended defect formation, and stress on ultrashallow junction formation must be considered.

Gate Stack and Silicide Issues in Silicon Processing

Gate Stack and Silicide Issues in Silicon Processing PDF Author:
Publisher:
ISBN:
Category : Electric leakage
Languages : en
Pages : 296

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Book Description


Gate Stack and Silicide Issues in Silicon: Volume 670

Gate Stack and Silicide Issues in Silicon: Volume 670 PDF Author: S. A. Campbell
Publisher:
ISBN:
Category : Technology & Engineering
Languages : en
Pages : 296

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Book Description
The MRS Symposium Proceeding series is an internationally recognised reference suitable for researchers and practitioners. This volume was first published in 2002.

Gate Stack and Silicide Issues in Silicon Processing: Volume 611

Gate Stack and Silicide Issues in Silicon Processing: Volume 611 PDF Author: L. A. Clevenger
Publisher: Cambridge University Press
ISBN: 9781558995192
Category : Technology & Engineering
Languages : en
Pages : 0

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Book Description
As the feature size of microelectronic devices approaches the deep submicron regime, the process development and integration issues related to gate stack and silicide processing are key challenges. Gate leakage is rising due to direct tunneling. Power and reliability concerns are expected to limit the ultimate scaling of SiO2-based insulators to about 1.5nm. Gate insulators must not deleteriously affect the interface quality, thermal stability, charge trapping, or process integration. Metal gate materials and damascene gates are being investigated, in conjunction with the application of a high-permittivity gate insulator, to provide sufficient device performance at ULSI dimensions. The silicidation process is also coming under pressure. Narrow device widths and decreasing junction depths are making the formation of low-leakage, low-resistance silicide straps extremely difficult. Producing shallower junctions via ion implantation is inhibited by transient enhanced diffusion and low beam currents at low implantation energies. Gate stack and contact film effects, such as point defect injection, extended defect formation, and stress on ultrashallow junction formation must be considered.

Si Front End Processing - Physics and Technology II of Dopant-Defect Interactions II: Volume 610

Si Front End Processing - Physics and Technology II of Dopant-Defect Interactions II: Volume 610 PDF Author: Aditya Agarwal
Publisher:
ISBN:
Category : Technology & Engineering
Languages : en
Pages : 448

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Book Description
This proceedings of the April 2000 symposium deals with formation of electrical junctions in the front-end processing of devices for the approaching end-of-the-roadmap. The 60 papers address 2D dopant characterization, ion implantation and shallow junction technology, group III diffusion and activation, carbon diffusion and activation, group V diffusion and activation, vacancy-type defects, regrown amorphous layers, and structure and properties of point and extended defects. Topics include ultra-shallow junction formation and gate activation in deep-submicron CMOS, low energy implantation of boron with decaborane ions, modeling ramp rate effects on shallow junction formation, clustering equilibrium and deactivation kinetics in As doped silicon, and atomistic modeling of complex silicon processing scenarios. c. Book News Inc.

Interfaces, Adhesion, and Processing in Polymer Systems

Interfaces, Adhesion, and Processing in Polymer Systems PDF Author: Spiros Haralambos Anastasiadis
Publisher:
ISBN:
Category : Science
Languages : en
Pages : 232

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Amorphous and Heterogeneous Silicon Thin Films

Amorphous and Heterogeneous Silicon Thin Films PDF Author:
Publisher:
ISBN:
Category : Amorphous semiconductors
Languages : en
Pages : 1026

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Microcrystalline and Nanocrystalline Semiconductors

Microcrystalline and Nanocrystalline Semiconductors PDF Author:
Publisher:
ISBN:
Category : Semiconductors
Languages : en
Pages : 716

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Morphological and Compositional Evolution of Heteroepitaxial Semiconductor Thin Films: Volume 618

Morphological and Compositional Evolution of Heteroepitaxial Semiconductor Thin Films: Volume 618 PDF Author: J. Mirecki Millunchick
Publisher: Mrs Proceedings
ISBN:
Category : Science
Languages : en
Pages : 360

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Book Description
The MRS Symposium Proceeding series is an internationally recognised reference suitable for researchers and practitioners.

Magnetic Materials, Structures and Processing for Information Storage: Volume 614

Magnetic Materials, Structures and Processing for Information Storage: Volume 614 PDF Author: Materials Research Society. Fall Meeting
Publisher:
ISBN:
Category : Computers
Languages : en
Pages : 200

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Book Description
The MRS Symposium Proceeding series is an internationally recognised reference suitable for researchers and practitioners.