Formal Verification of Floating-Point Hardware Design

Formal Verification of Floating-Point Hardware Design PDF Author: David M. Russinoff
Publisher: Springer Nature
ISBN: 3030871819
Category : Computers
Languages : en
Pages : 448

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Book Description
This is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods. Formal Verification of Floating-Point Hardware Design, Second Edition advances a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic that has been developed and applied to the formal verification of commercial floating-point units over the course of more than two decades, during which the author was employed by several major microprocessor design companies. The theory is extended to the analysis of several algorithms and optimization techniques that are commonly used in commercial implementations of elementary arithmetic operations. As a basis for the formal verification of such implementations, high-level specifications of the basic arithmetic instructions of several major industry-standard floating-point architectures are presented, including all details pertaining to the handling of exceptional conditions. The methodology is illustrated in the comprehensive verification of a variety of state-of-the-art commercial floating-point designs developed by Arm Holdings. This revised edition reflects the evolving microarchitectures and increasing sophistication of Arm processors, and the variation in the design goals of execution speed, hardware area requirements, and power consumption. Many new results have been added to Parts I—III (Register-Transfer Logic, Floating-Point Arithmetic, and Implementation of Elementary Operations), extending the theory and describing new techniques. These were derived as required in the verification of the new RTL designs described in Part V.

Formal Verification of Floating-Point Hardware Design

Formal Verification of Floating-Point Hardware Design PDF Author: David M. Russinoff
Publisher: Springer
ISBN: 3319955136
Category : Technology & Engineering
Languages : en
Pages : 382

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Book Description
This is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods. Formal Verification of Floating-Point Hardware Design advances a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic that has been developed and applied to the formal verification of commercial floating-point units over the course of more than two decades, during which the author was employed by several major microprocessor design companies. The book consists of five parts, the first two of which present a rigorous exposition of the general theory based on the first principles of arithmetic. Part I covers bit vectors and the bit manipulation primitives, integer and fixed-point encodings, and bit-wise logical operations. Part II addresses the properties of floating-point numbers, the formats in which they are encoded as bit vectors, and the various modes of floating-point rounding. In Part III, the theory is extended to the analysis of several algorithms and optimization techniques that are commonly used in commercial implementations of elementary arithmetic operations. As a basis for the formal verification of such implementations, Part IV contains high-level specifications of correctness of the basic arithmetic instructions of several major industry-standard floating-point architectures, including all details pertaining to the handling of exceptional conditions. Part V illustrates the methodology, applying the preceding theory to the comprehensive verification of a state-of-the-art commercial floating-point unit. All of these results have been formalized in the logic of the ACL2 theorem prover and mechanically checked to ensure their correctness. They are presented here, however, in simple conventional mathematical notation. The book presupposes no familiarity with ACL2, logic design, or any mathematics beyond basic high school algebra. It will be of interest to verification engineers as well as arithmetic circuit designers who appreciate the value of a rigorous approach to their art, and is suitable as a graduate text in computer arithmetic.

Formal Methods for Hardware Verification

Formal Methods for Hardware Verification PDF Author: Marco Bernardo
Publisher: Springer
ISBN: 3540343059
Category : Computers
Languages : en
Pages : 250

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Book Description
This book presents 8 papers accompanying the lectures of leading researchers given at the 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems (SFM 2006). SFM 2006 was devoted to formal techniques for hardware verification and covers several aspects of the hardware design process, including hardware design languages and simulation, property specification formalisms, automatic test pattern generation, symbolic trajectory evaluation, and more.

Formal Verification of Control System Software

Formal Verification of Control System Software PDF Author: Pierre-Loïc Garoche
Publisher: Princeton University Press
ISBN: 0691181306
Category : Mathematics
Languages : en
Pages : 230

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Book Description
An essential introduction to the analysis and verification of control system software The verification of control system software is critical to a host of technologies and industries, from aeronautics and medical technology to the cars we drive. The failure of controller software can cost people their lives. In this authoritative and accessible book, Pierre-Loïc Garoche provides control engineers and computer scientists with an indispensable introduction to the formal techniques for analyzing and verifying this important class of software. Too often, control engineers are unaware of the issues surrounding the verification of software, while computer scientists tend to be unfamiliar with the specificities of controller software. Garoche provides a unified approach that is geared to graduate students in both fields, covering formal verification methods as well as the design and verification of controllers. He presents a wealth of new verification techniques for performing exhaustive analysis of controller software. These include new means to compute nonlinear invariants, the use of convex optimization tools, and methods for dealing with numerical imprecisions such as floating point computations occurring in the analyzed software. As the autonomy of critical systems continues to increase—as evidenced by autonomous cars, drones, and satellites and landers—the numerical functions in these systems are growing ever more advanced. The techniques presented here are essential to support the formal analysis of the controller software being used in these new and emerging technologies.

The Design and Formal Verification of an Integrated Circuit for Use in a Floating-point Systolic Array Fast Fourier Transform Processor

The Design and Formal Verification of an Integrated Circuit for Use in a Floating-point Systolic Array Fast Fourier Transform Processor PDF Author: Peter E. DelVecchio
Publisher:
ISBN:
Category :
Languages : en
Pages : 438

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Book Description


Correct Hardware Design and Verification Methods

Correct Hardware Design and Verification Methods PDF Author: Daniel Geist
Publisher: Springer
ISBN: 3540397248
Category : Computers
Languages : en
Pages : 439

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Book Description
This book constitutes the refereed proceedings of the 12th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods, CHARME 2003, held in L'Aquila, Italy in October 2003. The 24 revised full papers and 8 short papers presented were carefully reviewed and selected from 65 submissions. The papers are organized in topical sections on software verification, automata based methods, processor verification, specification methods, theorem proving, bounded model checking, and model checking and applications.

Handbook of Floating-Point Arithmetic

Handbook of Floating-Point Arithmetic PDF Author: Jean-Michel Muller
Publisher: Springer Science & Business Media
ISBN: 0817647058
Category : Mathematics
Languages : en
Pages : 579

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Book Description
Floating-point arithmetic is the most widely used way of implementing real-number arithmetic on modern computers. However, making such an arithmetic reliable and portable, yet fast, is a very difficult task. As a result, floating-point arithmetic is far from being exploited to its full potential. This handbook aims to provide a complete overview of modern floating-point arithmetic. So that the techniques presented can be put directly into practice in actual coding or design, they are illustrated, whenever possible, by a corresponding program. The handbook is designed for programmers of numerical applications, compiler designers, programmers of floating-point algorithms, designers of arithmetic operators, and more generally, students and researchers in numerical analysis who wish to better understand a tool used in their daily work and research.

Formal Verification

Formal Verification PDF Author: Erik Seligman
Publisher: Elsevier
ISBN: 0323956130
Category : Computers
Languages : en
Pages : 428

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Book Description
Formal Verification: An Essential Toolkit for Modern VLSI Design, Second Edition presents practical approaches for design and validation, with hands-on advice to help working engineers integrate these techniques into their work. Formal Verification (FV) enables a designer to directly analyze and mathematically explore the quality or other aspects of a Register Transfer Level (RTL) design without using simulations. This can reduce time spent validating designs and more quickly reach a final design for manufacturing. Building on a basic knowledge of SystemVerilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes. Every chapter in the second edition has been updated to reflect evolving FV practices and advanced techniques. In addition, a new chapter, Formal Signoff on Real Projects, provides guidelines for implementing signoff quality FV, completely replacing some simulation tasks with significantly more productive FV methods. After reading this book, readers will be prepared to introduce FV in their organization to effectively deploy FV techniques that increase design and validation productivity. Covers formal verification algorithms that help users gain full coverage without exhaustive simulation Helps readers understand formal verification tools and how they differ from simulation tools Shows how to create instant testbenches to gain insights into how models work and to find initial bugs Presents insights from Intel insiders who share their hard-won knowledge and solutions to complex design problems

A Roadmap for Formal Property Verification

A Roadmap for Formal Property Verification PDF Author: Pallab Dasgupta
Publisher: Springer Science & Business Media
ISBN: 1402047584
Category : Technology & Engineering
Languages : en
Pages : 260

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Book Description
Integrating formal property verification (FPV) into an existing design process raises several interesting questions. This book develops the answers to these questions and fits them into a roadmap for formal property verification – a roadmap that shows how to glue FPV technology into the traditional validation flow. The book explores the key issues in this powerful technology through simple examples that mostly require no background on formal methods.

Formal Methods and Software Engineering

Formal Methods and Software Engineering PDF Author: Jin Song Dong
Publisher: Springer Science & Business Media
ISBN: 354020461X
Category : Computers
Languages : en
Pages : 693

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Book Description
This book constitutes the refereed proceedings of the 5th International Conference on Formal Engineering Methods, ICFEM 2003, held in Singapore in November 2003. The 34 revised full papers presented together with 3 invited contributions were carefully reviewed and selected from 91 submissions. The papers are organized in topical sections on testing and validation, state diagrams, PVS/HOL, refinement, hybrid systems, Z/Object-Z, Petri nets, timed automata, system modelling and checking, and semantics and synthesis.