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Author: Assem Shoukry Mohamed Hussein
Publisher:
ISBN:
Category : Decoders (Electronics)
Languages : en
Pages : 66
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Book Description
Low-density Parity-check (LDPC) codes are very powerful linear error-correcting codes, first introduced by Gallager in 1963. They are now used in many communication standards due to their ability to achieve near Shannon-capacity performance. Stochastic decoding is a hardware-efficient method of iterative decoding of LDPC codes. In this work, we investigate the capability of stochastic decoding to tolerate circuit soft errors while maintaining good bit error rate performance and low error floor. Soft errors can be intended faults as a result of either supply voltage scaling to reduce power consumption or overclocking the system to achieve a higher throughput. They can also be unintended faults as a result of temperature or process variations. We develop two models to emulate these circuit errors at the system level. We apply our models to two standardized LDPC codes (10GBASE-T and WiMAX). Simulation results show that stochastic decoding is very tolerant to faults and errors, where it can tolerate a probability of setup time violation of 0.1 in the wires of the decoder. Hence, stochastic decoding can be very useful in systems with very low power or high performance requirements where we can push the limits of power or speed by lowering the supply voltage or highly overclocking the system while maintaining good performance. In addition, a chip has been designed and sent to fabrication to do post-silicon validation and verify our models.
Author: Assem Shoukry Mohamed Hussein
Publisher:
ISBN:
Category : Decoders (Electronics)
Languages : en
Pages : 66
Get Book Here
Book Description
Low-density Parity-check (LDPC) codes are very powerful linear error-correcting codes, first introduced by Gallager in 1963. They are now used in many communication standards due to their ability to achieve near Shannon-capacity performance. Stochastic decoding is a hardware-efficient method of iterative decoding of LDPC codes. In this work, we investigate the capability of stochastic decoding to tolerate circuit soft errors while maintaining good bit error rate performance and low error floor. Soft errors can be intended faults as a result of either supply voltage scaling to reduce power consumption or overclocking the system to achieve a higher throughput. They can also be unintended faults as a result of temperature or process variations. We develop two models to emulate these circuit errors at the system level. We apply our models to two standardized LDPC codes (10GBASE-T and WiMAX). Simulation results show that stochastic decoding is very tolerant to faults and errors, where it can tolerate a probability of setup time violation of 0.1 in the wires of the decoder. Hence, stochastic decoding can be very useful in systems with very low power or high performance requirements where we can push the limits of power or speed by lowering the supply voltage or highly overclocking the system while maintaining good performance. In addition, a chip has been designed and sent to fabrication to do post-silicon validation and verify our models.
Author: Christoforos N. Hadjicostis
Publisher: Springer Science & Business Media
ISBN: 1461508533
Category : Technology & Engineering
Languages : en
Pages : 202
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Book Description
Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems describes coding approaches for designing fault-tolerant systems, i.e., systems that exhibit structured redundancy that enables them to distinguish between correct and incorrect results or between valid and invalid states. Since redundancy is expensive and counter-intuitive to the traditional notion of system design, the book focuses on resource-efficient methodologies that avoid excessive use of redundancy by exploiting the algorithmic/dynamic structure of a particular combinational or dynamic system. The first part of Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems focuses on fault-tolerant combinational systems providing a review of von Neumann's classical work on Probabilistic Logics (including some more recent work on noisy gates) and describing the use of arithmetic coding and algorithm-based fault-tolerant schemes in algebraic settings. The second part of the book focuses on fault tolerance in dynamic systems. Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems also discusses how, in a dynamic system setting, one can relax the traditional assumption that the error-correcting mechanism is fault-free by using distributed error correcting mechanisms. The final chapter presents a methodology for fault diagnosis in discrete event systems that are described by Petri net models; coding techniques are used to quickly detect and identify failures. From the Foreword: "Hadjicostis has significantly expanded the setting to processes occurring in more general algebraic and dynamic systems... The book responds to the growing need to handle faults in complex digital chips and complex networked systems, and to consider the effects of faults at the design stage rather than afterwards." George Verghese, Massachusetts Institute of Technology Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems will be of interest to both researchers and practitioners in the area of fault tolerance, systems design and control.
Author: Man Young Rhee
Publisher: McGraw-Hill Companies
ISBN:
Category : Computers
Languages : en
Pages : 488
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Book Description
Author: K. Kokula Krishna Hari, Geetam Singh Tomar, E Saikishore, Tai-hoon Kim
Publisher: TECHNO FORUM R&D CENTRE
ISBN: 819205750X
Category :
Languages : en
Pages : 125
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Book Description
Author: Cyrille Chavet
Publisher: Springer
ISBN: 3319105698
Category : Technology & Engineering
Languages : en
Pages : 197
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Book Description
This book provides thorough coverage of error correcting techniques. It includes essential basic concepts and the latest advances on key topics in design, implementation, and optimization of hardware/software systems for error correction. The book’s chapters are written by internationally recognized experts in this field. Topics include evolution of error correction techniques, industrial user needs, architectures, and design approaches for the most advanced error correcting codes (Polar Codes, Non-Binary LDPC, Product Codes, etc). This book provides access to recent results, and is suitable for graduate students and researchers of mathematics, computer science, and engineering. • Examines how to optimize the architecture of hardware design for error correcting codes; • Presents error correction codes from theory to optimized architecture for the current and the next generation standards; • Provides coverage of industrial user needs advanced error correcting techniques. Advanced Hardware Design for Error Correcting Codes includes a foreword by Claude Berrou.
Author: G. R. Redinbo
Publisher:
ISBN:
Category :
Languages : en
Pages : 2
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Book Description
New fault-tolerant architectures are investigated to protect modern VLSI implementations against soft errors, internal momentary errors, random in both time and space, characterized by their short and infrequent nature. Work has progressed on both recursive and nonrecursive digital filters. One approach in the recursive case uses many parallel sections, each employing distinct finite field arithmetic and protected by powerful cyclic codes distributed throughout the realization. These results are easily extended to the signal processing aspects of other important systems such as protecting and speeding the operations in cyclic error-correcting code decoders. In another direction, convolutions between data arrays can be protected with cyclic codes defined over the real rings and fields commonly used in arithmetic units. On the other hand, recursive realizations can be made fault-tolerant by embedding convolutional error-correcting codes, defined over either real or complex fields or finite integer rings, directly with the filter weighting. This is a natural integration since both the filtering operations and those generating the convolutional codes are essentially the same once the time-varying nature of the code structure is properly located. The impact of fault tolerance on system overhead is being analyzed, and the advantages of interacting with existing test subsystems, such as scan designs and built-in self-test, are being evaluated.
Author: Martin Tomlinson
Publisher: Springer
ISBN: 3319511033
Category : Technology & Engineering
Languages : en
Pages : 527
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Book Description
This book discusses both the theory and practical applications of self-correcting data, commonly known as error-correcting codes. The applications included demonstrate the importance of these codes in a wide range of everyday technologies, from smartphones to secure communications and transactions. Written in a readily understandable style, the book presents the authors’ twenty-five years of research organized into five parts: Part I is concerned with the theoretical performance attainable by using error correcting codes to achieve communications efficiency in digital communications systems. Part II explores the construction of error-correcting codes and explains the different families of codes and how they are designed. Techniques are described for producing the very best codes. Part III addresses the analysis of low-density parity-check (LDPC) codes, primarily to calculate their stopping sets and low-weight codeword spectrum which determines the performance of th ese codes. Part IV deals with decoders designed to realize optimum performance. Part V describes applications which include combined error correction and detection, public key cryptography using Goppa codes, correcting errors in passwords and watermarking. This book is a valuable resource for anyone interested in error-correcting codes and their applications, ranging from non-experts to professionals at the forefront of research in their field. This book is open access under a CC BY 4.0 license.
Author: Warren J. Gross
Publisher: Springer
ISBN: 3030037304
Category : Technology & Engineering
Languages : en
Pages : 215
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Book Description
This book covers the history and recent developments of stochastic computing. Stochastic computing (SC) was first introduced in the 1960s for logic circuit design, but its origin can be traced back to von Neumann's work on probabilistic logic. In SC, real numbers are encoded by random binary bit streams, and information is carried on the statistics of the binary streams. SC offers advantages such as hardware simplicity and fault tolerance. Its promise in data processing has been shown in applications including neural computation, decoding of error-correcting codes, image processing, spectral transforms and reliability analysis. There are three main parts to this book. The first part, comprising Chapters 1 and 2, provides a history of the technical developments in stochastic computing and a tutorial overview of the field for both novice and seasoned stochastic computing researchers. In the second part, comprising Chapters 3 to 8, we review both well-established and emerging design approaches for stochastic computing systems, with a focus on accuracy, correlation, sequence generation, and synthesis. The last part, comprising Chapters 9 and 10, provides insights into applications in machine learning and error-control coding.
Author: William Wesley Peterson
Publisher: MIT Press
ISBN: 9780262160391
Category : Computers
Languages : en
Pages : 584
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Book Description
The coding problem; Introduction to algebra; Linear codes; Error correction capabilities of linear codes; Important linear block codes; Polynomial rings and galois fields; Linear switching circuits; Cyclic codes; Bose-chaudhuri-hocquenghem codes; Arithmetic codes.
Author: Aiden A. Bruen
Publisher: American Mathematical Soc.
ISBN: 0821849565
Category : Mathematics
Languages : en
Pages : 255
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Book Description
This interdisciplinary volume contains papers from both a conference and special session on Error-Control Codes, Information Theory and Applied Cryptography. The conference was held at the Fields Institute in Toronto, On, Canada from December 5-6, 2007, and the special session was held at the Canadian Mathematical Society's winter meeting in London, ON, Canada from December 8-10, 2007. The volume features cutting-edge theoretical results on the Reed-Muller and Reed-Solomon codes, classical linear codes, codes from nets and block designs, LDPC codes, perfect quantum and orthogonal codes, iterative decoding, magnetic storage and digital memory devices, and MIMO channels. There are new contributions on privacy reconciliation, resilient functions, cryptographic hash functions, and new work on quantum coins. Related original work in finite geometries concerns two-weight codes coming from partial spreads, (0, 1) matrices with forbidden configurations, Andre embeddings, and representations of projective spaces in affine planes. Great care has been taken to ensure that high expository standards are met by the papers in this volume. Accordingly, the papers are written in a user-friendly format. The hope is that this volume will be of interst and of benefit both to the experienced and to newcomers alike.
