Fabrication and Characterization of III-V Tunnel Field-effect Transistors for Low Voltage Logic Applications

Fabrication and Characterization of III-V Tunnel Field-effect Transistors for Low Voltage Logic Applications PDF Author: Brian R. Romanczyk
Publisher:
ISBN:
Category : Field-effect transistors
Languages : en
Pages : 216

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Book Description
"With voltage scaling to reduce power consumption in scaled transistors the subthreshold swing is becoming a critical factor influencing the minimum voltage margin between the transistor on and off-states. Conventional metal-oxide-semiconductor field-effect transistors (MOSFETs) are fundamentally limited to a 60 mV/dec swing due to the thermionic emission current transport mechanism at room temperature. Tunnel field-effect transistors (TFETs) utilize band-to-band tunneling as the current transport mechanism resulting in the potential for sub-60 mV/dec subthreshold swings and have been identified as a possible replacement to the MOSFET for low-voltage logic applications. The TFET operates as a gated p-i-n diode under reverse bias where the gate electrode is placed over the intrinsic channel allowing for modulation of the tunnel barrier thickness. When the barrier is sufficiently thin the tunneling probability increases enough to allow for significant number of electrons to tunnel from the source into the channel. To date, experimental TFET reports using III-V semiconductors have failed to produce devices that combine a steep subthreshold swing with a large enough drive current to compete with scaled CMOS. This study developed the foundations for TFET fabrication by improving an established Esaki tunnel diode process flow and extending it to include the addition of a gate electrode to form a TFET. The gating process was developed using an In0.53Ga0.57As TFET which demonstrated a minimum subthreshold slope of 100 mV/dec. To address the issue of TFET drive current an InAs/GaSb heterojunction TFET structure was investigated taking advantage of the smaller tunnel barrier height."--Abstract.

Fabrication and Characterization of III-V Tunnel Field-effect Transistors for Low Voltage Logic Applications

Fabrication and Characterization of III-V Tunnel Field-effect Transistors for Low Voltage Logic Applications PDF Author: Brian R. Romanczyk
Publisher:
ISBN:
Category : Field-effect transistors
Languages : en
Pages : 216

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Book Description
"With voltage scaling to reduce power consumption in scaled transistors the subthreshold swing is becoming a critical factor influencing the minimum voltage margin between the transistor on and off-states. Conventional metal-oxide-semiconductor field-effect transistors (MOSFETs) are fundamentally limited to a 60 mV/dec swing due to the thermionic emission current transport mechanism at room temperature. Tunnel field-effect transistors (TFETs) utilize band-to-band tunneling as the current transport mechanism resulting in the potential for sub-60 mV/dec subthreshold swings and have been identified as a possible replacement to the MOSFET for low-voltage logic applications. The TFET operates as a gated p-i-n diode under reverse bias where the gate electrode is placed over the intrinsic channel allowing for modulation of the tunnel barrier thickness. When the barrier is sufficiently thin the tunneling probability increases enough to allow for significant number of electrons to tunnel from the source into the channel. To date, experimental TFET reports using III-V semiconductors have failed to produce devices that combine a steep subthreshold swing with a large enough drive current to compete with scaled CMOS. This study developed the foundations for TFET fabrication by improving an established Esaki tunnel diode process flow and extending it to include the addition of a gate electrode to form a TFET. The gating process was developed using an In0.53Ga0.57As TFET which demonstrated a minimum subthreshold slope of 100 mV/dec. To address the issue of TFET drive current an InAs/GaSb heterojunction TFET structure was investigated taking advantage of the smaller tunnel barrier height."--Abstract.

Fabrication, Characterization and Physics of III-V Tunneling Field Effect Transistors for Low Power Logic and RF Applications

Fabrication, Characterization and Physics of III-V Tunneling Field Effect Transistors for Low Power Logic and RF Applications PDF Author: Bijesh Rajamohanan
Publisher:
ISBN:
Category :
Languages : en
Pages : 140

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Book Description


Tunneling Field Effect Transistor Technology

Tunneling Field Effect Transistor Technology PDF Author: Lining Zhang
Publisher: Springer
ISBN: 3319316532
Category : Technology & Engineering
Languages : en
Pages : 217

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Book Description
This book provides a single-source reference to the state-of-the art in tunneling field effect transistors (TFETs). Readers will learn the TFETs physics from advanced atomistic simulations, the TFETs fabrication process and the important roles that TFETs will play in enabling integrated circuit designs for power efficiency.

Advanced Field-Effect Transistors

Advanced Field-Effect Transistors PDF Author: Dharmendra Singh Yadav
Publisher: CRC Press
ISBN: 1003816282
Category : Technology & Engineering
Languages : en
Pages : 370

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Book Description
Advanced Field-Effect Transistors: Theory and Applications offers a fresh perspective on the design and analysis of advanced field-effect transistor (FET) devices and their applications. The text emphasizes both fundamental and new paradigms that are essential for upcoming advancement in the field of transistors beyond complementary metal–oxide–semiconductors (CMOS). This book uses lucid, intuitive language to gradually increase the comprehension of readers about the key concepts of FETs, including their theory and applications. In order to improve readers’ learning opportunities, Advanced Field-Effect Transistors: Theory and Applications presents a wide range of crucial topics: • Design and challenges in tunneling FETs • Various modeling approaches for FETs • Study of organic thin-film transistors • Biosensing applications of FETs • Implementation of memory and logic gates with FETs The advent of low-power semiconductor devices and related implications for upcoming technology nodes provide valuable insight into low-power devices and their applicability in wireless, biosensing, and circuit aspects. As a result, researchers are constantly looking for new semiconductor devices to meet consumer demand. This book gives more details about all aspects of the low-power technology, including ongoing and prospective circumstances with fundamentals of FET devices as well as sophisticated low-power applications.

Fundamentals of Tunnel Field-Effect Transistors

Fundamentals of Tunnel Field-Effect Transistors PDF Author: Sneh Saurabh
Publisher: CRC Press
ISBN: 1315350262
Category : Science
Languages : en
Pages : 216

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Book Description
During the last decade, there has been a great deal of interest in TFETs. To the best authors’ knowledge, no book on TFETs currently exists. The proposed book provides readers with fundamental understanding of the TFETs. It explains the interesting characteristics of the TFETs, pointing to their strengths and weaknesses, and describes the novel techniques that can be employed to overcome these weaknesses and improve their characteristics. Different tradeoffs that can be made in designing TFETs have also been highlighted. Further, the book provides simulation example files of TFETs that could be run using a commercial device simulator.

Organic Field Effect Transistors

Organic Field Effect Transistors PDF Author: Ioannis Kymissis
Publisher: Springer Science & Business Media
ISBN: 0387921346
Category : Technology & Engineering
Languages : en
Pages : 156

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Book Description
Organic Field Effect Transistors presents the state of the art in organic field effect transistors (OFETs), with a particular focus on the materials and techniques useful for making integrated circuits. The monograph begins with some general background on organic semiconductors, discusses the types of organic semiconductor materials suitable for making field effect transistors, the fabrication processes used to make integrated Circuits, and appropriate methods for measurement and modeling. Organic Field Effect Transistors is written as a basic introduction to the subject for practitioners. It will also be of interest to researchers looking for references and techniques that are not part of their subject area or routine. A synthetic organic chemist, for example, who is interested in making OFETs may use the book more as a device design and characterization reference. A thin film processing electrical engineer, on the other hand, may be interested in the book to learn about what types of electron carrying organic semiconductors may be worth trying and learning more about organic semiconductor physics.

Tunneling Field Effect Transistors

Tunneling Field Effect Transistors PDF Author: T. S. Arun Samuel
Publisher: CRC Press
ISBN: 1000877825
Category : Technology & Engineering
Languages : en
Pages : 326

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Book Description
This book will give insight into emerging semiconductor devices from their applications in electronic circuits, which form the backbone of electronic equipment. It provides desired exposure to the ever-growing field of low-power electronic devices and their applications in nanoscale devices, memory design, and biosensing applications. Tunneling Field Effect Transistors: Design, Modeling and Applications brings researchers and engineers from various disciplines of the VLSI domain to together tackle the emerging challenges in the field of nanoelectronics and applications of advanced low-power devices. The book begins by discussing the challenges of conventional CMOS technology from the perspective of low-power applications, and it also reviews the basic science and developments of subthreshold swing technology and recent advancements in the field. The authors discuss the impact of semiconductor materials and architecture designs on TFET devices and the performance and usage of FET devices in various domains such as nanoelectronics, Memory Devices, and biosensing applications. They also cover a variety of FET devices, such as MOSFETs and TFETs, with various structures based on the tunneling transport phenomenon. The contents of the book have been designed and arranged in such a way that Electrical Engineering students, researchers in the field of nanodevices and device-circuit codesign, as well as industry professionals working in the domain of semiconductor devices, will find the material useful and easy to follow.

Ferroelectric-Gate Field Effect Transistor Memories

Ferroelectric-Gate Field Effect Transistor Memories PDF Author: Byung-Eun Park
Publisher: Springer Nature
ISBN: 9811512124
Category : Technology & Engineering
Languages : en
Pages : 421

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Book Description
This book provides comprehensive coverage of the materials characteristics, process technologies, and device operations for memory field-effect transistors employing inorganic or organic ferroelectric thin films. This transistor-type ferroelectric memory has interesting fundamental device physics and potentially large industrial impact. Among various applications of ferroelectric thin films, the development of nonvolatile ferroelectric random access memory (FeRAM) has been most actively progressed since the late 1980s and reached modest mass production for specific application since 1995. There are two types of memory cells in ferroelectric nonvolatile memories. One is the capacitor-type FeRAM and the other is the field-effect transistor (FET)-type FeRAM. Although the FET-type FeRAM claims the ultimate scalability and nondestructive readout characteristics, the capacitor-type FeRAMs have been the main interest for the major semiconductor memory companies, because the ferroelectric FET has fatal handicaps of cross-talk for random accessibility and short retention time. This book aims to provide the readers with development history, technical issues, fabrication methodologies, and promising applications of FET-type ferroelectric memory devices, presenting a comprehensive review of past, present, and future technologies. The topics discussed will lead to further advances in large-area electronics implemented on glass, plastic or paper substrates as well as in conventional Si electronics. The book is composed of chapters written by leading researchers in ferroelectric materials and related device technologies, including oxide and organic ferroelectric thin films.

Emerging Devices for Low-Power and High-Performance Nanosystems

Emerging Devices for Low-Power and High-Performance Nanosystems PDF Author: Simon Deleonibus
Publisher: CRC Press
ISBN: 0429858612
Category : Science
Languages : en
Pages : 284

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Book Description
The history of information and communications technologies (ICT) has been paved by both evolutive paths and challenging alternatives, so-called emerging devices and architectures. Their introduction poses the issues of state variable definition, information processing, and process integration in 2D, above IC, and in 3D. This book reviews the capabilities of integrated nanosystems to match low power and high performance either by hybrid and heterogeneous CMOS in 2D/3D or by emerging devices for alternative sensing, actuating, data storage, and processing. The choice of future ICTs will need to take into account not only their energy efficiency but also their sustainability in the global ecosystem.

Fabrication and Characterization of High Performance Silicon Nanowire Field Effect Transistors

Fabrication and Characterization of High Performance Silicon Nanowire Field Effect Transistors PDF Author: Muhammad Maksudur Rahman
Publisher:
ISBN:
Category : Field-effect transistors
Languages : en
Pages : 65

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Book Description
Quasi one-dimensional (1-D) field-effect transistors (FET), such as Si nanowire FETs (Si NW-FETs), have shown promise for more aggressive channel length scaling, better electrostatic gate control, higher integration densities and low-power applications. At the same time, an accurate bench-marking of their performance remains a challenging task due to difficulties in definition of the exact channel length, gate capacitance and transconductance. In 1-D Si FETs, one also often observes a significant degradation of their mobility and on/off ratio. The goal of this study is to implement the idea of the FET performance enhancement while simultaneously performing a more rigorous data extraction. To achieve these goals, we fabricated dual-gate undoped Si NW-FETs with various NW diameters The Si NWs are grown by Au-catalyzed vapor-transport For our top-gate NW-FET, the subthreshold swing was determined to be 85-90 mV/decade, whereas the best subthreshold swings for Si NW-FETs until now were ~135-140 mV/decade. We achieved a ON/OFF current ratio of 10 7 due to improved electrostatic control and electron transport conditions inside the channel. This is on the higher end of any ON/OFF ratios thus far reported for NW FETs The hole mobility in our NW-FETs was around 250.400 cm[superscript 2] /Vs, according to different extraction procedures. In our mobility calculations we included the NW silicidation effect, which reduces the effective channel length. We calculated the top gate capacitance using Technology Computer Aided Design (TCAD) Sentaurus simulator, which gives more accurate value of capacitance of the NW over any analytical formulas. Thus we fabricate and rigorously study Si NW.s intrinsic properties which are very important for digital logic circuit application. In the second part of the study, we carried out simulation of Si NW FET devices to shed light on the carrier transport behavior that also explains experimental data.