Author: Malek Safieh
Publisher:
ISBN: 9783658344603
Category :
Languages : en
Pages : 0
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Book Description
In this work, algorithms and architectures for cryptography and source coding are developed, which are suitable for many resource-constrained embedded systems such as non-volatile flash memories. A new concept for elliptic curve cryptography is presented, which uses an arithmetic over Gaussian integers. Gaussian integers are a subset of the complex numbers with integers as real and imaginary parts. Ordinary modular arithmetic over Gaussian integers is computational expensive. To reduce the complexity, a new arithmetic based on the Montgomery reduction is presented. For the elliptic curve point multiplication, this arithmetic over Gaussian integers improves the computational efficiency, the resistance against side channel attacks, and reduces the memory requirements. Furthermore, an efficient variant of the Lempel-Ziv-Welch (LZW) algorithm for universal lossless data compression is investigated. Instead of one LZW dictionary, this algorithm applies several dictionaries to speed up the encoding process. Two dictionary partitioning techniques are introduced that improve the compression rate and reduce the memory size of this parallel dictionary LZW algorithm. About the Author Malek Safieh is a research scientist in the field of cryptography and data compression.
Author: Malek Safieh
Publisher: Springer Nature
ISBN: 3658344598
Category : Computers
Languages : en
Pages : 155
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Book Description
In this work, algorithms and architectures for cryptography and source coding are developed, which are suitable for many resource-constrained embedded systems such as non-volatile flash memories. A new concept for elliptic curve cryptography is presented, which uses an arithmetic over Gaussian integers. Gaussian integers are a subset of the complex numbers with integers as real and imaginary parts. Ordinary modular arithmetic over Gaussian integers is computational expensive. To reduce the complexity, a new arithmetic based on the Montgomery reduction is presented. For the elliptic curve point multiplication, this arithmetic over Gaussian integers improves the computational efficiency, the resistance against side channel attacks, and reduces the memory requirements. Furthermore, an efficient variant of the Lempel-Ziv-Welch (LZW) algorithm for universal lossless data compression is investigated. Instead of one LZW dictionary, this algorithm applies several dictionaries to speed up the encoding process. Two dictionary partitioning techniques are introduced that improve the compression rate and reduce the memory size of this parallel dictionary LZW algorithm.
Author: Mohammed Rajab
Publisher: Springer Vieweg
ISBN: 9783658289812
Category : Computers
Languages : en
Pages : 143
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Book Description
Mohammed Rajab proposes different technologies like the error correction coding (ECC), sources coding and offset calibration that aim to improve the reliability of the NAND flash memory with low implementation costs for industrial application. The author examines different ECC schemes based on concatenated codes like generalized concatenated codes (GCC) which are applicable for NAND flash memories by using the hard and soft input decoding. Furthermore, different data compression schemes are examined in order to reduce the write amplification effect and also to improve the error correct capability of the ECC by combining both schemes.
Author: Daniele Lacamera
Publisher: Packt Publishing Ltd
ISBN: 1803242051
Category : Computers
Languages : en
Pages : 342
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Book Description
Design safe and reliable software for embedded systems and explore the internals of device drivers, RTOS, and TEE Key FeaturesIdentify and overcome challenges in embedded environmentsUnderstand and implement the steps required to increase the security of IoT solutionsBuild safety-critical and memory-safe parallel and distributed embedded systemsBook Description Embedded Systems Architecture begins with a bird's-eye view of embedded development and how it differs from the other systems that you may be familiar with. This book will help you get the hang of the internal working of various components in real-world systems. You'll start by setting up a development environment and then move on to the core system architectural concepts, exploring system designs, boot-up mechanisms, and memory management. As you progress through the topics, you'll explore the programming interface and device drivers to establish communication via TCP/IP and take measures to increase the security of IoT solutions. Finally, you'll be introduced to multithreaded operating systems through the development of a scheduler and the use of hardware-assisted trusted execution mechanisms. With the help of this book, you will gain the confidence to work with embedded systems at an architectural level and become familiar with various aspects of embedded software development on microcontrollers—such as memory management, multithreading, and RTOS—an approach oriented to memory isolation. What you will learnParticipate in the design and definition phase of an embedded productGet to grips with writing code for ARM Cortex-M microcontrollersBuild an embedded development lab and optimize the workflowSecure embedded systems with TLSDemystify the architecture behind the communication interfacesUnderstand the design and development patterns for connected and distributed devices in the IoTMaster multitasking parallel execution patterns and real-time operating systemsBecome familiar with Trusted Execution Environment (TEE)Who this book is for If you're a software developer or designer looking to learn about embedded programming, this is the book for you. You'll also find this book useful if you're a beginner or a less experienced embedded programmer on a quest to expand your knowledge on embedded systems.
Author: Kohei Arai
Publisher: Springer Nature
ISBN: 3030801292
Category : Technology & Engineering
Languages : en
Pages : 1108
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Book Description
This book is a comprehensive collection of chapters focusing on the core areas of computing and their further applications in the real world. Each chapter is a paper presented at the Computing Conference 2021 held on 15-16 July 2021. Computing 2021 attracted a total of 638 submissions which underwent a double-blind peer review process. Of those 638 submissions, 235 submissions have been selected to be included in this book. The goal of this conference is to give a platform to researchers with fundamental contributions and to be a premier venue for academic and industry practitioners to share new ideas and development experiences. We hope that readers find this volume interesting and valuable as it provides the state-of-the-art intelligent methods and techniques for solving real-world problems. We also expect that the conference and its publications is a trigger for further related research and technology improvements in this important subject.
Author: Seungbum Hong
Publisher: Springer
ISBN: 1489975373
Category : Technology & Engineering
Languages : en
Pages : 273
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Book Description
This book is an introduction to the fundamentals of emerging non-volatile memories and provides an overview of future trends in the field. Readers will find coverage of seven important memory technologies, including Ferroelectric Random Access Memory (FeRAM), Ferromagnetic RAM (FMRAM), Multiferroic RAM (MFRAM), Phase-Change Memories (PCM), Oxide-based Resistive RAM (RRAM), Probe Storage, and Polymer Memories. Chapters are structured to reflect diffusions and clashes between different topics. Emerging Non-Volatile Memories is an ideal book for graduate students, faculty, and professionals working in the area of non-volatile memory. This book also: Covers key memory technologies, including Ferroelectric Random Access Memory (FeRAM), Ferromagnetic RAM (FMRAM), and Multiferroic RAM (MFRAM), among others. Provides an overview of non-volatile memory fundamentals. Broadens readers’ understanding of future trends in non-volatile memories.
Author: Rino Micheloni
Publisher: Springer
ISBN: 9401775125
Category : Computers
Languages : en
Pages : 380
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Book Description
This book walks the reader through the next step in the evolution of NAND flash memory technology, namely the development of 3D flash memories, in which multiple layers of memory cells are grown within the same piece of silicon. It describes their working principles, device architectures, fabrication techniques and practical implementations, and highlights why 3D flash is a brand new technology. After reviewing market trends for both NAND and solid state drives (SSDs), the book digs into the details of the flash memory cell itself, covering both floating gate and emerging charge trap technologies. There is a plethora of different materials and vertical integration schemes out there. New memory cells, new materials, new architectures (3D Stacked, BiCS and P-BiCS, 3D FG, 3D VG, 3D advanced architectures); basically, each NAND manufacturer has its own solution. Chapter 3 to chapter 7 offer a broad overview of how 3D can materialize. The 3D wave is impacting emerging memories as well and chapter 8 covers 3D RRAM (resistive RAM) crosspoint arrays. Visualizing 3D structures can be a challenge for the human brain: this is way all these chapters contain a lot of bird’s-eye views and cross sections along the 3 axes. The second part of the book is devoted to other important aspects, such as advanced packaging technology (i.e. TSV in chapter 9) and error correction codes, which have been leveraged to improve flash reliability for decades. Chapter 10 describes the evolution from legacy BCH to the most recent LDPC codes, while chapter 11 deals with some of the most recent advancements in the ECC field. Last but not least, chapter 12 looks at 3D flash memories from a system perspective. Is 14nm the last step for planar cells? Can 100 layers be integrated within the same piece of silicon? Is 4 bit/cell possible with 3D? Will 3D be reliable enough for enterprise and datacenter applications? These are some of the questions that this book helps answering by providing insights into 3D flash memory design, process technology and applications.
Author: Giovanni Campardo
Publisher: Springer Science & Business Media
ISBN: 9783540201984
Category : Computers
Languages : en
Pages : 616
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Book Description
VLSI-Design for Non-Volatile Memories is intended for electrical engineers and graduate students who want to enter into the integrated circuit design world. Non-volatile memories are treated as an example to explain general design concepts. Practical illustrative examples of non-volatile memories, including flash types, are showcased to give insightful examples of the discussed design approaches. A collection of photos is included to make the reader familiar with silicon aspects. Throughout all parts of this book, the authors have taken a practical and applications-driven point of view, providing a comprehensive and easily understood approach to all the concepts discussed. Giovanni Campardo and Rino Micheloni have a solid track record of leading design activities at the STMicroelectronics Flash Division. David Novosel is President and founder of Intelligent Micro Design, Inc., Pittsburg, PA.
Author: Hideto Hidaka
Publisher: Springer
ISBN: 3319553062
Category : Technology & Engineering
Languages : en
Pages : 247
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Book Description
This book provides a comprehensive introduction to embedded flash memory, describing the history, current status, and future projections for technology, circuits, and systems applications. The authors describe current main-stream embedded flash technologies from floating-gate 1Tr, floating-gate with split-gate (1.5Tr), and 1Tr/1.5Tr SONOS flash technologies and their successful creation of various applications. Comparisons of these embedded flash technologies and future projections are also provided. The authors demonstrate a variety of embedded applications for auto-motive, smart-IC cards, and low-power, representing the leading-edge technology developments for eFlash. The discussion also includes insights into future prospects of application-driven non-volatile memory technology in the era of smart advanced automotive system, such as ADAS (Advanced Driver Assistance System) and IoE (Internet of Everything). Trials on technology convergence and future prospects of embedded non-volatile memory in the new memory hierarchy are also described. Introduces the history of embedded flash memory technology for micro-controller products and how embedded flash innovations developed; Includes comprehensive and detailed descriptions of current main-stream embedded flash memory technologies, sub-system designs and applications; Explains why embedded flash memory requirements are different from those of stand-alone flash memory and how to achieve specific goals with technology development and circuit designs; Describes a mature and stable floating-gate 1Tr cell technology imported from stand-alone flash memory products - that then introduces embedded-specific split-gate memory cell technologies based on floating-gate storage structure and charge-trapping SONOS technology and their eFlash sub-system designs; Describes automotive and smart-IC card applications requirements and achievements in advanced eFlash beyond 4 0nm node.
Author: Jakub Szefer
Publisher: Springer Nature
ISBN: 3031017609
Category : Technology & Engineering
Languages : en
Pages : 154
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Book Description
With growing interest in computer security and the protection of the code and data which execute on commodity computers, the amount of hardware security features in today's processors has increased significantly over the recent years. No longer of just academic interest, security features inside processors have been embraced by industry as well, with a number of commercial secure processor architectures available today. This book aims to give readers insights into the principles behind the design of academic and commercial secure processor architectures. Secure processor architecture research is concerned with exploring and designing hardware features inside computer processors, features which can help protect confidentiality and integrity of the code and data executing on the processor. Unlike traditional processor architecture research that focuses on performance, efficiency, and energy as the first-order design objectives, secure processor architecture design has security as the first-order design objective (while still keeping the others as important design aspects that need to be considered). This book aims to present the different challenges of secure processor architecture design to graduate students interested in research on architecture and hardware security and computer architects working in industry interested in adding security features to their designs. It aims to educate readers about how the different challenges have been solved in the past and what are the best practices, i.e., the principles, for design of new secure processor architectures. Based on the careful review of past work by many computer architects and security researchers, readers also will come to know the five basic principles needed for secure processor architecture design. The book also presents existing research challenges and potential new research directions. Finally, this book presents numerous design suggestions, as well as discusses pitfalls and fallacies that designers should avoid.
