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Author: C. Thomas Gray
Publisher: Springer Science & Business Media
ISBN: 146153206X
Category : Technology & Engineering
Languages : en
Pages : 219
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Book Description
The quest for higher performance digital systems for applications such as gen eral purpose computing, signal/image processing, and telecommunications and an increasing cost consciousness have led to a major thrust for high speed VLSI systems implemented in inexpensive and widely available technologies such as CMOS. This monograph, based on the first author's doctoral dissertation, con centrates on the technique of wave pipelining as one method toward achieving this goal. The primary focus of this monograph is to provide a coherent pre sentation of the theory of wave pipelined operation of digital circuits and to discuss practical design techniques for the realization of wave pipelined circuits in the CMOS technology. Wave pipelining can be applied to a variety of cir cuits for increased performance. For example, many architectures that support systolic computation lend themselves to wave pipelined realization. Also, the wave pipeline design methodology emphasizes the role of controlled clock skew in extracting enhanced performance from circuits that are not deeply pipelined. Wave pipelining (also known as maximal rate pipelining) is a timing method ology used in digital systems to increase the number of effective pipeline stages without increasing the number of physical registers in the pipeline. Using this technique, new data is applied to the inputs of a combinational logic block be fore the outputs due to previous inputs are available thus effectively pipelining the combinational logic and maximizing the utilization of the logic.
Author: C. Thomas Gray
Publisher: Springer Science & Business Media
ISBN: 146153206X
Category : Technology & Engineering
Languages : en
Pages : 219
Get Book Here
Book Description
The quest for higher performance digital systems for applications such as gen eral purpose computing, signal/image processing, and telecommunications and an increasing cost consciousness have led to a major thrust for high speed VLSI systems implemented in inexpensive and widely available technologies such as CMOS. This monograph, based on the first author's doctoral dissertation, con centrates on the technique of wave pipelining as one method toward achieving this goal. The primary focus of this monograph is to provide a coherent pre sentation of the theory of wave pipelined operation of digital circuits and to discuss practical design techniques for the realization of wave pipelined circuits in the CMOS technology. Wave pipelining can be applied to a variety of cir cuits for increased performance. For example, many architectures that support systolic computation lend themselves to wave pipelined realization. Also, the wave pipeline design methodology emphasizes the role of controlled clock skew in extracting enhanced performance from circuits that are not deeply pipelined. Wave pipelining (also known as maximal rate pipelining) is a timing method ology used in digital systems to increase the number of effective pipeline stages without increasing the number of physical registers in the pipeline. Using this technique, new data is applied to the inputs of a combinational logic block be fore the outputs due to previous inputs are available thus effectively pipelining the combinational logic and maximizing the utilization of the logic.
Author: Eby G. Friedman
Publisher: Springer Science & Business Media
ISBN: 1468484400
Category : Technology & Engineering
Languages : en
Pages : 163
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Book Description
A number of fundamental topics in the field of high performance clock distribution networks is covered in this book. High Performance Clock Distribution Networks is composed of ten contributions from authors at academic and industrial institutions. Topically, these contributions can be grouped within three primary areas. The first topic area deals with exploiting the localized nature of clock skew. The second topic area deals with the implementation of these clock distribution networks, while the third topic area considers more long-range aspects of next-generation clock distribution networks. High Performance Clock Distribution Networks presents a number of interesting strategies for designing and building high performance clock distribution networks. Many aspects of the ideas presented in these contributions are being developed and applied today in next-generation high-performance microprocessors.
Author: William J. Dally
Publisher: Cambridge University Press
ISBN: 1139936239
Category : Computers
Languages : en
Pages : 944
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Book Description
What makes some computers slow? Why do some digital systems operate reliably for years while others fail mysteriously every few hours? How can some systems dissipate kilowatts while others operate off batteries? These questions of speed, reliability, and power are all determined by the system-level electrical design of a digital system. Digital Systems Engineering presents a comprehensive treatment of these topics. It combines a rigorous development of the fundamental principles in each area with real-world examples of circuits and methods. The book not only serves as an undergraduate textbook, filling the gap between circuit design and logic design, but can also help practising digital designers keep pace with the speed and power of modern integrated circuits. The techniques described in this book, once used only in supercomputers, are essential to the correct and efficient operation of any type of digital system.
Author: Simone Raoux
Publisher: Springer Science & Business Media
ISBN: 0387848746
Category : Technology & Engineering
Languages : en
Pages : 430
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Book Description
"Phase Change Materials: Science and Applications" provides a unique introduction of this rapidly developing field. Clearly written and well-structured, this volume describes the material science of these fascinating materials from a theoretical and experimental perspective. Readers will find an in-depth description of their existing and potential applications in optical and solid state storage devices as well as reconfigurable logic applications. Researchers, graduate students and scientists with an interest in this field will find "Phase Change Materials" to be a valuable reference.
Author: Gerson A. S. Machado
Publisher: IET
ISBN: 9780852968741
Category : Technology & Engineering
Languages : en
Pages : 1072
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Book Description
This book brings together innovative modelling, simulation and design techniques in CMOS, SOI, GaAs and BJT to achieve successful high-yield manufacture for low-power, high-speed and reliable-by-design analogue and mixed-mode integrated systems.
Author: Eli Chiprout
Publisher: Springer Science & Business Media
ISBN: 1461531160
Category : Technology & Engineering
Languages : en
Pages : 207
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Book Description
The intense drive for signal integrity has been at the forefront ofrapid and new developments in CAD algorithms. Thousands ofengineers, intent on achieving the best design possible, use SPICE on a daily basis for analog simulation and general circuit analysis. But the strained demand for high data speeds, coupled with miniaturizationon an unprecedented scale, has highlighted the previously negligible effects of interconnects; effects which are not always handled appro priately by the present levels of SPICE. Signals at these higher speeds may be degraded by long interconnect lengths compared to the increasingly shorter sig nal rise times. Interconnect structures can be diverse (pins, connectors, leads, microstrips, striplines, etc. ) and present at any of the hierarchical packaging levels: integrated circuits, printed circuit boards, multi-chip modules or sys tem backplanes. Analysis of these effects in any CAD package has become a necessity. Asymptotic waveform evaluation (AWE) and other moment matching tech niques have recently proven useful in the analysis of interconnect structures and various networks containing large linear structures with nonlinear termi nations. Previously, all that was available to the designer was a full SPICE simulation or a quick but uncertain timing estimation. Moment matching, used in linear systems analysis as a method of model reduction, describes a method to extract a small set of dominant poles from a large network. The information is obtained from the Taylor series coefficients (moments) of that system.
Author: Victor Malyshkin
Publisher: Springer Science & Business Media
ISBN: 3540406735
Category : Computers
Languages : en
Pages : 582
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Book Description
This book constitutes the refereed proceedings of the 7th International Conference on Parallel Computing Technologies, PaCT 2003, held in Novosibirsk, Russia in September 2003. The 38 revised full papers presented together with 4 invited papers and 10 poster papers were carefully reviewed and selected from 78 submissions. The papers are organized in topical sections on theory, software, applications, and tools. A broad variety of parallel processing issues and distributed computing in general are addressed.
Author: John M. Cohn
Publisher: Springer Science & Business Media
ISBN: 1461527562
Category : Technology & Engineering
Languages : en
Pages : 299
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Book Description
This book presents a detailed summary of research on automatic layout of device-level analog circuits that was undertaken in the late 1980s and early 1990s at Carnegie Mellon University. We focus on the work behind the creation of the tools called KOAN and ANAGRAM II, which form part of the core of the CMU ACACIA analog CAD system. KOAN is a device placer for custom analog cells; ANANGRAM II a detailed area router for these analog cells. We strive to present the motivations behind the architecture of these tools, including detailed discussion of the subtle technology and circuit concerns that must be addressed in any successful analog or mixed-signal layout tool. Our approach in organizing the chapters of the book has been to present our algo rithms as a series of responses to these very real and very difficult analog layout problems. Finally, we present numerous examples of results generated by our algorithms. This research was supported in part by the Semiconductor Research Corpora tion, by the National Science Foundation, by Harris Semiconductor, and by the International Business Machines Corporation Resident Study Program. Finally, just for the record: John Cohn was the designer of the KOAN placer; David Garrod was the designer of the ANAGRAM II router (and its predeces sor, ANAGRAM I). This book was architected by all four authors, edited by John Cohn and Rob Rutenbar, and produced in finished form by John Cohn.
Author: Andrew B. Kahng
Publisher: Springer Science & Business Media
ISBN: 1475723636
Category : Technology & Engineering
Languages : en
Pages : 301
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Book Description
On Optimal Interconnections for VLSI describes, from a geometric perspective, algorithms for high-performance, high-density interconnections during the global and detailed routing phases of circuit layout. First, the book addresses area minimization, with a focus on near-optimal approximation algorithms for minimum-cost Steiner routing. In addition to practical implementations of recent methods, the implications of recent results on spanning tree degree bounds and the method of Zelikovsky are discussed. Second, the book addresses delay minimization, starting with a discussion of accurate, yet algorithmically tractable, delay models. Recent minimum-delay constructions are highlighted, including provably good cost-radius tradeoffs, critical-sink routing algorithms, Elmore delay-optimal routing, graph Steiner arborescences, non-tree routing, and wiresizing. Third, the book addresses skew minimization for clock routing and prescribed-delay routing formulations. The discussion starts with early matching-based constructions and goes on to treat zero-skew routing with provably minimum wirelength, as well as planar clock routing. Finally, the book concludes with a discussion of multiple (competing) objectives, i.e., how to optimize area, delay, skew, and other objectives simultaneously. These techniques are useful when the routing instance has heterogeneous resources or is highly congested, as in FPGA routing, multi-chip packaging, and very dense layouts. Throughout the book, the emphasis is on practical algorithms and a complete self-contained development. On Optimal Interconnections for VLSI will be of use to both circuit designers (CAD tool users) as well as researchers and developers in the area of performance-driven physical design.
Author: Rajeev Murgai
Publisher: Springer Science & Business Media
ISBN: 1461523451
Category : Technology & Engineering
Languages : en
Pages : 432
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Book Description
Short turnaround has become critical in the design of electronic systems. Software- programmable components such as microprocessors and digital signal processors have been used extensively in such systems since they allow rapid design revisions. However, the inherent performance limitations of software-programmable systems mean that they are inadequate for high-performance designs. Designers thus turned to gate arrays as a solution. User-programmable gate arrays (field-programmable gate arrays, FPGAs) have recently emerged and are changing the way electronic systems are designed and implemented. The growing complexity of the logic circuits that can be packed onto an FPGA chip means that it has become important to have automatic synthesis tools that implement logic functions on these architectures. Logic Synthesis for Field-Programmable Gate Arrays describes logic synthesis for both look-up table (LUT) and multiplexor-based architectures, with a balanced presentation of existing techniques together with algorithms and the system developed by the authors. Audience: A useful reference for VLSI designers, developers of computer-aided design tools, and anyone involved in or with FPGAs.
