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ISBN:
Category :
Languages : en
Pages : 76
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Book Description
This report describes the accomplishments during the contract period (June 28, to June 27, 1992) on the computer aided analysis of CMOS device and circuit degradation due to hot-carrier effects. The task involved four subtasks: (1) simulation of gate oxide degradation during long-term circuit operation; (2) determination of overall circuit performance after hot-electron stress; (3) probabilistic timing approach to hot-carrier-effect estimation; (4) parametric macromodeling of hot-carrier-induced degradation in MOS VLSI circuits. The first two parts are continued subtasks while the latter two are new subtasks. In order to simulate the reliability of MOS circuits, both the detailed model and the macromodel are used; the detailed model is used for accurate analysis of small circuits and the macromodel is used for very large circuits for computational efficiency. Since the hot-carrier-induced aging of MOS circuits is input-pattern dependent, an important task is to develop a computationally efficient probabilistic timing approach to hot-carrier-effect estimation without resorting to the Monte Carlo simulation. We have developed a new probabilistic approach that accounts for cumulative effects of all input waveform combinations in a single run. VLSI reliability, Hot-carrier effects, Computer aided design.
Author:
Publisher:
ISBN:
Category :
Languages : en
Pages : 76
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Book Description
This report describes the accomplishments during the contract period (June 28, to June 27, 1992) on the computer aided analysis of CMOS device and circuit degradation due to hot-carrier effects. The task involved four subtasks: (1) simulation of gate oxide degradation during long-term circuit operation; (2) determination of overall circuit performance after hot-electron stress; (3) probabilistic timing approach to hot-carrier-effect estimation; (4) parametric macromodeling of hot-carrier-induced degradation in MOS VLSI circuits. The first two parts are continued subtasks while the latter two are new subtasks. In order to simulate the reliability of MOS circuits, both the detailed model and the macromodel are used; the detailed model is used for accurate analysis of small circuits and the macromodel is used for very large circuits for computational efficiency. Since the hot-carrier-induced aging of MOS circuits is input-pattern dependent, an important task is to develop a computationally efficient probabilistic timing approach to hot-carrier-effect estimation without resorting to the Monte Carlo simulation. We have developed a new probabilistic approach that accounts for cumulative effects of all input waveform combinations in a single run. VLSI reliability, Hot-carrier effects, Computer aided design.
Author: Yusuf Leblebici
Publisher: Springer Science & Business Media
ISBN: 1461532507
Category : Technology & Engineering
Languages : en
Pages : 223
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Book Description
As the complexity and the density of VLSI chips increase with shrinking design rules, the evaluation of long-term reliability of MOS VLSI circuits is becoming an important problem. The assessment and improvement of reliability on the circuit level should be based on both the failure mode analysis and the basic understanding of the physical failure mechanisms observed in integrated circuits. Hot-carrier induced degrada tion of MOS transistor characteristics is one of the primary mechanisms affecting the long-term reliability of MOS VLSI circuits. It is likely to become even more important in future generation chips, since the down ward scaling of transistor dimensions without proportional scaling of the operating voltage aggravates this problem. A thorough understanding of the physical mechanisms leading to hot-carrier related degradation of MOS transistors is a prerequisite for accurate circuit reliability evaluation. It is also being recognized that important reliability concerns other than the post-manufacture reliability qualification need to be addressed rigorously early in the design phase. The development and use of accurate reliability simulation tools are therefore crucial for early assessment and improvement of circuit reliability : Once the long-term reliability of the circuit is estimated through simulation, the results can be compared with predetermined reliability specifications or limits. If the predicted reliability does not satisfy the requirements, appropriate design modifications may be carried out to improve the resistance of the devices to degradation.
Author: Eiji Takeda
Publisher: Elsevier
ISBN: 0080926223
Category : Technology & Engineering
Languages : en
Pages : 329
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Book Description
The exploding number of uses for ultrafast, ultrasmall integrated circuits has increased the importance of hot-carrier effects in manufacturing as well as for other technological applications. They are rapidly movingout of the research lab and into the real world. This book is derived from Dr. Takedas book in Japanese, Hot-Carrier Effects, (published in 1987 by Nikkei Business Publishers). However, the new book is much more than a translation. Takedas original work was a starting point for developing this much more complete and fundamental text on this increasingly important topic. The new work encompasses not only all the latest research and discoveries made in the fast-paced area of hot carriers, but also includes the basics of MOS devices, and the practical considerations related to hot carriers. Chapter one itself is a comprehensive review of MOS device physics which allows a reader with little background in MOS devices to pick up a sufficient amount of information to be able to follow the rest of the book The book is written to allow the reader to learn about MOS Device Reliability in a relatively short amount of time, making the texts detailed treatment of hot-carrier effects especially useful and instructive to both researchers and others with varyingamounts of experience in the field The logical organization of the book begins by discussing known principles, then progresses to empirical information and, finally, to practical solutions Provides the most complete review of device degradation mechanisms as well as drain engineering methods Contains the most extensive reference list on the subject
Author: Cheng Wang
Publisher: Springer Science & Business Media
ISBN: 1468485474
Category : Science
Languages : en
Pages : 345
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Book Description
As device dimensions decrease, hot-carrier effects, which are due mainly to the presence of a high electric field inside the device, are becoming a major design concern. On the one hand, the detrimental effects-such as transconductance degradation and threshold shift-need to be minimized or, if possible, avoided altogether. On the other hand, performance such as the programming efficiency of nonvolatile memories or the carrier velocity inside the devices-need to be maintained or improved through the use of submicron technologies, even in the presence of a reduced power supply. As a result, one of the major challenges facing MOS design engineers today is to harness the hot-carrier effects so that, without sacrificing product performance, degradation can be kept to a minimum and a reli able design obtained. To accomplish this, the physical mechanisms re sponsible for the degradations should first be experimentally identified and characterized. With adequate models thus obtained, steps can be taken to optimize the design, so that an adequate level of quality assur ance in device or circuit performance can be achieved. This book ad dresses these hot-carrier design issues for MOS devices and circuits, and is used primarily as a professional guide for process development engi neers, device engineers, and circuit designers who are interested in the latest developments in hot-carrier degradation modeling and hot-carrier reliability design techniques. It may also be considered as a reference book for graduate students who have some research interests in this excit ing, yet sometime controversial, field.
Author: Khandker Nazrul Quader
Publisher:
ISBN:
Category :
Languages : en
Pages : 368
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Author: Narain Arora
Publisher: World Scientific
ISBN: 9812707581
Category : Technology & Engineering
Languages : en
Pages : 633
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Book Description
A reprint of the classic text, this book popularized compact modeling of electronic and semiconductor devices and components for college and graduate-school classrooms, and manufacturing engineering, over a decade ago. The first comprehensive book on MOS transistor compact modeling, it was the most cited among similar books in the area and remains the most frequently cited today. The coverage is device-physics based and continues to be relevant to the latest advances in MOS transistor modeling. This is also the only book that discusses in detail how to measure device model parameters required for circuit simulations. The book deals with the MOS Field Effect Transistor (MOSFET) models that are derived from basic semiconductor theory. Various models are developed, ranging from simple to more sophisticated models that take into account new physical effects observed in submicron transistors used in today's (1993) MOS VLSI technology. The assumptions used to arrive at the models are emphasized so that the accuracy of the models in describing the device characteristics are clearly understood. Due to the importance of designing reliable circuits, device reliability models are also covered. Understanding these models is essential when designing circuits for state-of-the-art MOS ICs.
Author:
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ISBN:
Category : Integrated circuits
Languages : en
Pages : 218
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Category : Aeronautics
Languages : en
Pages : 488
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Book Description
Lists citations with abstracts for aerospace related reports obtained from world wide sources and announces documents that have recently been entered into the NASA Scientific and Technical Information Database.
Author: I. N. Hajj
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 63
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Book Description
Author:
Publisher:
ISBN:
Category :
Languages : en
Pages : 43
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