Testing Static Random Access Memories

Testing Static Random Access Memories PDF Author: Said Hamdioui
Publisher: Springer Science & Business Media
ISBN: 1475767064
Category : Technology & Engineering
Languages : en
Pages : 231

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Book Description
Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of static random access memories (SRAMs), both single-port and multi-port. It contributes to the technical acknowledge needed by those involved in memory testing, engineers and researchers. The book begins with outlining the most popular SRAMs architectures. Then, the description of realistic fault models, based on defect injection and SPICE simulation, are introduced. Thereafter, high quality and low cost test patterns, as well as test strategies for single-port, two-port and any p-port SRAMs are presented, together with some preliminary test results showing the importance of the new tests in reducing DPM level. The impact of the port restrictions (e.g., read-only ports) on the fault models, tests, and test strategies is also discussed. Features: -Fault primitive based analysis of memory faults, -A complete framework of and classification memory faults, -A systematic way to develop optimal and high quality memory test algorithms, -A systematic way to develop test patterns for any multi-port SRAM, -Challenges and trends in embedded memory testing.

Testing Static Random Access Memories

Testing Static Random Access Memories PDF Author: Said Hamdioui
Publisher: Springer Science & Business Media
ISBN: 1475767064
Category : Technology & Engineering
Languages : en
Pages : 231

Get Book Here

Book Description
Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of static random access memories (SRAMs), both single-port and multi-port. It contributes to the technical acknowledge needed by those involved in memory testing, engineers and researchers. The book begins with outlining the most popular SRAMs architectures. Then, the description of realistic fault models, based on defect injection and SPICE simulation, are introduced. Thereafter, high quality and low cost test patterns, as well as test strategies for single-port, two-port and any p-port SRAMs are presented, together with some preliminary test results showing the importance of the new tests in reducing DPM level. The impact of the port restrictions (e.g., read-only ports) on the fault models, tests, and test strategies is also discussed. Features: -Fault primitive based analysis of memory faults, -A complete framework of and classification memory faults, -A systematic way to develop optimal and high quality memory test algorithms, -A systematic way to develop test patterns for any multi-port SRAM, -Challenges and trends in embedded memory testing.

High Performance Memory Testing

High Performance Memory Testing PDF Author: R. Dean Adams
Publisher: Springer Science & Business Media
ISBN: 0306479729
Category : Technology & Engineering
Languages : en
Pages : 252

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Book Description
Are memory applications more critical than they have been in the past? Yes, but even more critical is the number of designs and the sheer number of bits on each design. It is assured that catastrophes, which were avoided in the past because memories were small, will easily occur if the design and test engineers do not do their jobs very carefully. High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is based on the author's 20 years of experience in memory design, memory reliability development and memory self test. High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is written for the professional and the researcher to help them understand the memories that are being tested.

Advanced Test Methods for SRAMs

Advanced Test Methods for SRAMs PDF Author: Alberto Bosio
Publisher: Springer Science & Business Media
ISBN: 1441909389
Category : Technology & Engineering
Languages : en
Pages : 179

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Book Description
Modern electronics depend on nanoscaled technologies that present new challenges in terms of testing and diagnostics. Memories are particularly prone to defects since they exploit the technology limits to get the highest density. This book is an invaluable guide to the testing and diagnostics of the latest generation of SRAM, one of the most widely applied types of memory. Classical methods for testing memory are designed to handle the so-called "static faults," but these test solutions are not sufficient for faults that are emerging in the latest Very Deep Sub-Micron (VDSM) technologies. These new fault models, referred to as "dynamic faults", are not covered by classical test solutions and require the dedicated test sequences presented in this book.

Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits

Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits PDF Author: M. Bushnell
Publisher: Springer Science & Business Media
ISBN: 0306470403
Category : Technology & Engineering
Languages : en
Pages : 690

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Book Description
The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a suitable textbook. For VLSI the foundation was provided by semiconductor device techn- ogy, circuit design, and electronic testing. In a computer engineering curriculum, therefore, it is necessary that foundations should be taught before applications. The field of VLSI has expanded to systems-on-a-chip, which include digital, memory, and mixed-signalsubsystems. To our knowledge this is the first textbook to cover all three types of electronic circuits. We have written this textbook for an undergraduate “foundations” course on electronic testing. Obviously, it is too voluminous for a one-semester course and a teacher will have to select from the topics. We did not restrict such freedom because the selection may depend upon the individual expertise and interests. Besides, there is merit in having a larger book that will retain its usefulness for the owner even after the completion of the course. With equal tenacity, we address the needs of three other groups of readers.

New Methods of Concurrent Checking

New Methods of Concurrent Checking PDF Author: Michael Gössel
Publisher: Springer Science & Business Media
ISBN: 140208420X
Category : Technology & Engineering
Languages : en
Pages : 186

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Book Description
Computers are everywhere around us. We, for example, as air passengers, car drivers, laptop users with Internet connection, cell phone owners, hospital patients, inhabitants in the vicinity of a nuclear power station, students in a digital library or customers in a supermarket are dependent on their correct operation. Computers are incredibly fast, inexpensive and equipped with almost unimag- able large storage capacity. Up to 100 million transistors per chip are quite common today - a single transistor for each citizen of a large capital city in the world can be 2 easily accommodated on an ordinary chip. The size of such a chip is less than 1 cm . This is a fantastic achievement for an unbelievably low price. However, the very small and rapidly decreasing dimensions of the transistors and their connections over the years are also the reason for growing problems with reliability that will dramatically increase for the nano-technologies in the near future. Can we always trust computers? Are computers always reliable? Are chips suf- ciently tested with respect to all possible permanent faults if we buy them at a low price or have errors due to undetected permanent faults to be discovered by c- current checking? Besides permanent faults, many temporary or transient faults are also to be expected.

Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits PDF Author: Manoj Sachdev
Publisher: Springer Science & Business Media
ISBN: 0387465472
Category : Technology & Engineering
Languages : en
Pages : 343

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Book Description
The 2nd edition of defect oriented testing has been extensively updated. New chapters on Functional, Parametric Defect Models and Inductive fault Analysis and Yield Engineering have been added to provide a link between defect sources and yield. The chapter on RAM testing has been updated with focus on parametric and SRAM stability testing. Similarly, newer material has been incorporated in digital fault modeling and analog testing chapters. The strength of Defect Oriented Testing for nano-Metric CMOS VLSIs lies in its industrial relevance.

Defect Oriented Testing for CMOS Analog and Digital Circuits

Defect Oriented Testing for CMOS Analog and Digital Circuits PDF Author: Manoj Sachdev
Publisher: Springer Science & Business Media
ISBN: 1475749260
Category : Technology & Engineering
Languages : en
Pages : 317

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Book Description
Defect oriented testing is expected to play a significant role in coming generations of technology. Smaller feature sizes and larger die sizes will make ICs more sensitive to defects that can not be modeled by traditional fault modeling approaches. Furthermore, with increased level of integration, an IC may contain diverse building blocks. Such blocks include, digital logic, PLAs, volatile and non-volatile memories, and analog interfaces. For such diverse building blocks, traditional fault modeling and test approaches will become increasingly inadequate. Defect oriented testing methods have come a long way from a mere interesting academic exercise to a hard industrial reality. Many factors have contributed to its industrial acceptance. Traditional approaches of testing modern integrated circuits (ICs) have been found to be inadequate in terms of quality and economics of test. In a globally competitive semiconductor market place, overall product quality and economics have become very important objectives. In addition, electronic systems are becoming increasingly complex and demand components of highest possible quality. Testing, in general and, defect oriented testing, in particular, help in realizing these objectives. Defect Oriented Testing for CMOS Analog and Digital Circuits is the first book to provide a complete overview of the subject. It is essential reading for all design and test professionals as well as researchers and students working in the field. `A strength of this book is its breadth. Types of designs considered include analog and digital circuits, programmable logic arrays, and memories. Having a fault model does not automatically provide a test. Sometimes, design for testability hardware is necessary. Many design for testability ideas, supported by experimental evidence, are included.' ... from the Foreword by Vishwani D. Agrawal

Introduction to VLSI Systems

Introduction to VLSI Systems PDF Author: Ming-Bo Lin
Publisher: CRC Press
ISBN: 143986859X
Category : Technology & Engineering
Languages : en
Pages : 917

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Book Description
With the advance of semiconductors and ubiquitous computing, the use of system-on-a-chip (SoC) has become an essential technique to reduce product cost. With this progress and continuous reduction of feature sizes, and the development of very large-scale integration (VLSI) circuits, addressing the harder problems requires fundamental understanding of circuit and layout design issues. Furthermore, engineers can often develop their physical intuition to estimate the behavior of circuits rapidly without relying predominantly on computer-aided design (CAD) tools. Introduction to VLSI Systems: A Logic, Circuit, and System Perspective addresses the need for teaching such a topic in terms of a logic, circuit, and system design perspective. To achieve the above-mentioned goals, this classroom-tested book focuses on: Implementing a digital system as a full-custom integrated circuit Switch logic design and useful paradigms that may apply to various static and dynamic logic families The fabrication and layout designs of complementary metal-oxide-semiconductor (CMOS) VLSI Important issues of modern CMOS processes, including deep submicron devices, circuit optimization, interconnect modeling and optimization, signal integrity, power integrity, clocking and timing, power dissipation, and electrostatic discharge (ESD) Introduction to VLSI Systems builds an understanding of integrated circuits from the bottom up, paying much attention to logic circuit, layout, and system designs. Armed with these tools, readers can not only comprehensively understand the features and limitations of modern VLSI technologies, but also have enough background to adapt to this ever-changing field.

System-on-Chip Test Architectures

System-on-Chip Test Architectures PDF Author: Laung-Terng Wang
Publisher: Morgan Kaufmann
ISBN: 0080556809
Category : Technology & Engineering
Languages : en
Pages : 893

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Book Description
Modern electronics testing has a legacy of more than 40 years. The introduction of new technologies, especially nanometer technologies with 90nm or smaller geometry, has allowed the semiconductor industry to keep pace with the increased performance-capacity demands from consumers. As a result, semiconductor test costs have been growing steadily and typically amount to 40% of today's overall product cost. This book is a comprehensive guide to new VLSI Testing and Design-for-Testability techniques that will allow students, researchers, DFT practitioners, and VLSI designers to master quickly System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs. - Emphasizes VLSI Test principles and Design for Testability architectures, with numerous illustrations/examples. - Most up-to-date coverage available, including Fault Tolerance, Low-Power Testing, Defect and Error Tolerance, Network-on-Chip (NOC) Testing, Software-Based Self-Testing, FPGA Testing, MEMS Testing, and System-In-Package (SIP) Testing, which are not yet available in any testing book. - Covers the entire spectrum of VLSI testing and DFT architectures, from digital and analog, to memory circuits, and fault diagnosis and self-repair from digital to memory circuits. - Discusses future nanotechnology test trends and challenges facing the nanometer design era; promising nanotechnology test techniques, including Quantum-Dots, Cellular Automata, Carbon-Nanotubes, and Hybrid Semiconductor/Nanowire/Molecular Computing. - Practical problems at the end of each chapter for students.

9th International Conference on Robotic, Vision, Signal Processing and Power Applications

9th International Conference on Robotic, Vision, Signal Processing and Power Applications PDF Author: Haidi Ibrahim
Publisher: Springer
ISBN: 9811017212
Category : Technology & Engineering
Languages : en
Pages : 821

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Book Description
The proceeding is a collection of research papers presented, at the 9th International Conference on Robotics, Vision, Signal Processing & Power Applications (ROVISP 2016), by researchers, scientists, engineers, academicians as well as industrial professionals from all around the globe to present their research results and development activities for oral or poster presentations. The topics of interest are as follows but are not limited to: • Robotics, Control, Mechatronics and Automation • Vision, Image, and Signal Processing • Artificial Intelligence and Computer Applications • Electronic Design and Applications • Telecommunication Systems and Applications • Power System and Industrial Applications • Engineering Education