Radiation-hardened-by-design Area-efficient All NMOS Memory Design PDF Download
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Author: Jung Eui Kim
Publisher:
ISBN:
Category : Electronic apparatus and appliances
Languages : en
Pages : 118
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Book Description
This project is focused on designing a radiation-hardened memory system with reasonable tradeoffs in area, power, and performance. Three radiation-hardened methods--Hamming codes, triple mode redundancy, and oversized gates--were applied to provide the most efficient protection. For the memory cell, an all-NMOS design was utilized to save cell area without sacrificing significant access time. By removing the usual separation between PMOS and NMOS, the cell area can decrease by up to 20 percent compared to that of the traditional SRAM and still maintain comparable performance and stability.
Author: Jung Eui Kim
Publisher:
ISBN:
Category : Electronic apparatus and appliances
Languages : en
Pages : 118
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Book Description
This project is focused on designing a radiation-hardened memory system with reasonable tradeoffs in area, power, and performance. Three radiation-hardened methods--Hamming codes, triple mode redundancy, and oversized gates--were applied to provide the most efficient protection. For the memory cell, an all-NMOS design was utilized to save cell area without sacrificing significant access time. By removing the usual separation between PMOS and NMOS, the cell area can decrease by up to 20 percent compared to that of the traditional SRAM and still maintain comparable performance and stability.
Author: Calligaro, Cristiano
Publisher: River Publishers
ISBN: 8770220204
Category : Technology & Engineering
Languages : en
Pages : 418
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Book Description
Rad-hard Semiconductor Memories is intended for researchers and professionals interested in understanding how to design and make a preliminary evaluation of rad-hard semiconductor memories, making leverage on standard CMOS manufacturing processes available from different silicon foundries and using different technology nodes. In the first part of the book, a preliminary overview of the effects of radiation in space, with a specific focus on memories, will be conducted to enable the reader to understand why specific design solutions are adopted to mitigate hard and soft errors. The second part will be devoted to RHBD (Radiation Hardening by Design) techniques for semiconductor components with a specific focus on memories. The approach will follow a top-down scheme starting from RHBD at architectural level (how to build a rad-hard floor-plan), at circuit level (how to mitigate radiation effects by handling transistors in the proper way) and at layout level (how to shape a layout to mitigate radiation effects). After the description of the mitigation techniques, the book enters in the core of the topic covering SRAMs (synchronous, asynchronous, single port and dual port) and PROMs (based on AntiFuse OTP technologies), describing how to design a rad-hard flash memory and fostering RHBD toward emerging memories like ReRAM. The last part will be a leap into emerging memories at a very early stage, not yet ready for industrial use in silicon but candidates to become an option for the next wave of rad-hard components. Technical topics discussed in the book include: Radiation effects on semiconductor components (TID, SEE)Radiation Hardening by Design (RHBD) TechniquesRad-hard SRAMsRad-hard PROMsRad-hard Flash NVMsRad-hard ReRAMsRad-hard emerging technologies
Author: Cristiano Calligaro
Publisher: CRC Press
ISBN: 1000793060
Category : Technology & Engineering
Languages : en
Pages : 417
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Book Description
Rad-hard Semiconductor Memories is intended for researchers and professionals interested in understanding how to design and make a preliminary evaluation of rad-hard semiconductor memories, making leverage on standard CMOS manufacturing processes available from different silicon foundries and using different technology nodes.In the first part of the book, a preliminary overview of the effects of radiation in space, with a specific focus on memories, will be conducted to enable the reader to understand why specific design solutions are adopted to mitigate hard and soft errors. The second part will be devoted to RHBD (Radiation Hardening by Design) techniques for semiconductor components with a specific focus on memories. The approach will follow a top-down scheme starting from RHBD at architectural level (how to build a rad-hard floor-plan), at circuit level (how to mitigate radiation effects by handling transistors in the proper way) and at layout level (how to shape a layout to mitigate radiation effects).After the description of the mitigation techniques, the book enters in the core of the topic covering SRAMs (synchronous, asynchronous, single port and dual port) and PROMs (based on AntiFuse OTP technologies), describing how to design a rad-hard flash memory and fostering RHBD toward emerging memories like ReRAM. The last part will be a leap into emerging memories at a very early stage, not yet ready for industrial use in silicon but candidates to become an option for the next wave of rad-hard components. Technical topics discussed in the book include: Radiation effects on semiconductor components (TID, SEE) Radiation Hardening by Design (RHBD) Techniques Rad-hard SRAMs Rad-hard PROMs Rad-hard Flash NVMs Rad-hard ReRAMs Rad-hard emerging technologies
Author: Raoul Velazco
Publisher: Springer Science & Business Media
ISBN: 140205646X
Category : Technology & Engineering
Languages : en
Pages : 273
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Book Description
This volume provides an extensive overview of radiation effects on integrated circuits, offering major guidelines for coping with radiation effects on components. It contains a set of chapters based on the tutorials presented at the International School on Effects of Radiation on Embedded Systems for Space Applications (SERESSA) that was held in Manaus, Brazil, November 20-25, 2005.
Author: Robert L. Nielsen
Publisher:
ISBN:
Category :
Languages : en
Pages : 43
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Book Description
The survival of data in a memory through very high levels of transient ionizing radiation (> 10 to the 11th power rads(Si)/sec) has been a very difficult problem. This report describes the principles used in the design of a hardened memory, using CMOS/SOS technology. The design also provides high packing density (1024 bits in less than 16000 sq mils), high speed (cycle time
Author: Stephen Rogich
Publisher:
ISBN:
Category :
Languages : en
Pages : 73
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Book Description
This final report covers work performed in designing a CMOS/SOS memory subsystem based upon given specifications for a 256-bit memory chip. The subsystem interfaces with the Survivable MOS Array Computer (SMARC). Logic design and interconnection for the subsystem are presented herein. So too are the designs and specifications for the three chip types which satisfy all subsystem functions. In addition, the report presents estimates of the producibility and reliability for these chips for both conventional and hardened gate insulators. (Author).
Author: Rajesh Garg
Publisher: Springer Science & Business Media
ISBN: 1441909311
Category : Technology & Engineering
Languages : en
Pages : 224
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Book Description
This monograph is motivated by the challenges faced in designing reliable VLSI systems in modern VLSI processes. The reliable operation of integrated circuits (ICs) has become increasingly dif?cult to achieve in the deep submicron (DSM) era. With continuouslydecreasing device feature sizes, combinedwith lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations, and radiation-inducedsoft errors. Among these noise sources, soft errors(or error caused by radiation particle strikes) have become an increasingly troublesome issue for memory arrays as well as c- binational logic circuits. Also, in the DSM era, process variations are increasing at a signi?cant rate, making it more dif?cult to design reliable VLSI circuits. Hence, it is important to ef?ciently design robust VLSI circuits that are resilient to radiation particle strikes and process variations. The work presented in this research mo- graph presents several analysis and design techniques with the goal of realizing VLSI circuits, which are radiation and process variation tolerant.
Author: Karl Christian Mohr
Publisher:
ISBN:
Category : Radiation hardening
Languages : en
Pages : 280
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Book Description
Author: Paul Marraffino
Publisher:
ISBN:
Category :
Languages : en
Pages : 205
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Book Description
The report describes work performed to develop a radiation-hardened MNOS memory array for use in a RAM memory of an airborne computer. A study of MNOS device operation led to the fabrication and test of several memory and fixed threshold transistors and 256-bit memory circuits. Environmental test data taken at three radiation simulation sources and under endurance stress is presented along with studies on circuit design, packaging, and system design.
Author: Jeffrey Prinzie
Publisher: Springer
ISBN: 3319786164
Category : Technology & Engineering
Languages : en
Pages : 205
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Book Description
This book presents state-of-the-art techniques for radiation hardened high-resolution Time-to-Digital converters and low noise frequency synthesizers. Throughout the book, advanced degradation mechanisms and error sources are discussed and several ways to prevent such errors are presented. An overview of the prerequisite physics of nuclear interactions is given that has been compiled in an easy to understand chapter. The book is structured in a way that different hardening techniques and solutions are supported by theory and experimental data with their various tradeoffs. Based on leading-edge research, conducted in collaboration between KU Leuven and CERN, the European Center for Nuclear Research Describes in detail advanced techniques to harden circuits against ionizing radiation Provides a practical way to learn and understand radiation effects in time-based circuits Includes an introduction to the underlying physics, circuit design, and advanced techniques accompanied with experimental data
