Prototype Rule-Based Reliability Analysis for VLSI Circuit Design PDF Download
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Category :
Languages : en
Pages : 82
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Book Description
This report describes the development and application of parametric and geometry based macro-models of hot-carrier induced dynamic degradation in MOS VLSI circuits. Previously, a simulation based approach has been used for reliability analysis, but this is inefficient for reliability assessment of very large scale integrated circuits. Geometry-based macro-models for hot-carrier reliability estimation have been developed. The macro-models express hot-carrier damage as functions of designable parameters such as transistor size (W), output loading capacitance (C1) and the input signal slew rate (a). A prototype rule- based reliability diagnosis tool, iRULE, has been developed. This tool uses the macro-models for designing hot-carrier resistant circuits without the need for transient reliability simulations. This provides the ability to analyze very large circuits with more than one million transistors on a workstation in a short amount of time. This report also describes a fast timing reliability simulation tool, ILLIADS-R, that can accurately estimate hot-carrier degradation while providing several orders of magnitude speed up over traditional transistor-level circuit simulators. Reliability, Hot-carrier degradation, VLSI CMOS Circuits, Simulation.
Author:
Publisher:
ISBN:
Category :
Languages : en
Pages : 82
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Book Description
This report describes the development and application of parametric and geometry based macro-models of hot-carrier induced dynamic degradation in MOS VLSI circuits. Previously, a simulation based approach has been used for reliability analysis, but this is inefficient for reliability assessment of very large scale integrated circuits. Geometry-based macro-models for hot-carrier reliability estimation have been developed. The macro-models express hot-carrier damage as functions of designable parameters such as transistor size (W), output loading capacitance (C1) and the input signal slew rate (a). A prototype rule- based reliability diagnosis tool, iRULE, has been developed. This tool uses the macro-models for designing hot-carrier resistant circuits without the need for transient reliability simulations. This provides the ability to analyze very large circuits with more than one million transistors on a workstation in a short amount of time. This report also describes a fast timing reliability simulation tool, ILLIADS-R, that can accurately estimate hot-carrier degradation while providing several orders of magnitude speed up over traditional transistor-level circuit simulators. Reliability, Hot-carrier degradation, VLSI CMOS Circuits, Simulation.
Author:
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Category : Aeronautics
Languages : en
Pages : 704
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Category : Science
Languages : en
Pages : 612
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Category : Government publications
Languages : en
Pages : 1148
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Author: Yusuf Leblebici
Publisher: Springer Science & Business Media
ISBN: 1461532507
Category : Technology & Engineering
Languages : en
Pages : 223
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Book Description
As the complexity and the density of VLSI chips increase with shrinking design rules, the evaluation of long-term reliability of MOS VLSI circuits is becoming an important problem. The assessment and improvement of reliability on the circuit level should be based on both the failure mode analysis and the basic understanding of the physical failure mechanisms observed in integrated circuits. Hot-carrier induced degrada tion of MOS transistor characteristics is one of the primary mechanisms affecting the long-term reliability of MOS VLSI circuits. It is likely to become even more important in future generation chips, since the down ward scaling of transistor dimensions without proportional scaling of the operating voltage aggravates this problem. A thorough understanding of the physical mechanisms leading to hot-carrier related degradation of MOS transistors is a prerequisite for accurate circuit reliability evaluation. It is also being recognized that important reliability concerns other than the post-manufacture reliability qualification need to be addressed rigorously early in the design phase. The development and use of accurate reliability simulation tools are therefore crucial for early assessment and improvement of circuit reliability : Once the long-term reliability of the circuit is estimated through simulation, the results can be compared with predetermined reliability specifications or limits. If the predicted reliability does not satisfy the requirements, appropriate design modifications may be carried out to improve the resistance of the devices to degradation.
Author: Behnam Ghavami
Publisher: Springer Nature
ISBN: 3030516105
Category : Technology & Engineering
Languages : en
Pages : 114
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Book Description
This book is intended for readers who are interested in the design of robust and reliable electronic digital systems. The authors cover emerging trends in design of today’s reliable electronic systems which are applicable to safety-critical applications, such as automotive or healthcare electronic systems. The emphasis is on modeling approaches and algorithms for analysis and mitigation of soft errors in nano-scale CMOS digital circuits, using techniques that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. The authors introduce software tools for analysis and mitigation of soft errors in electronic systems, which can be integrated easily with design flows. In addition to discussing soft error aware analysis techniques for combinational logic, the authors also describe new soft error mitigation strategies targeting commercial digital circuits. Coverage includes novel Soft Error Rate (SER) analysis techniques such as process variation aware SER estimation and GPU accelerated SER analysis techniques, in addition to SER reduction methods such as gate sizing and logic restructuring based SER techniques.
Author: Eugene R. Hnatek
Publisher: CRC Press
ISBN: 1482277719
Category : Technology & Engineering
Languages : en
Pages : 809
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Book Description
Examines all important aspects of integrated circuit design, fabrication, assembly and test processes as they relate to quality and reliability. This second edition discusses in detail: the latest circuit design technology trends; the sources of error in wafer fabrication and assembly; avenues of contamination; new IC packaging methods; new in-line process monitors and test structures; and more.;This work should be useful to electrical and electronics, quality and reliability, and industrial engineers; computer scientists; integrated circuit manufacturers; and upper-level undergraduate, graduate and continuing-education students in these disciplines.
Author: I. N. Hajj
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 63
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Author: Farid Nasri Najm
Publisher:
ISBN:
Category :
Languages : en
Pages : 190
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Book Description
This thesis presents a new technique for simulating integrated circuits, called probabilistic simulation. Using this technique, statistical descriptions of the voltage waveforms at the circuit primary inputs are used to derive corresponding statistical descriptions of the internal voltages and currents. To illustrate its utility, we use this approach to analyze integrated circuit reliability. Specifically, we focus on the problem of predicting the susceptibility of a given design to electromigration failures. We show that the median time-to-failure (MTF), due to electromigration, can be related to a stochastic model of the power supply and ground currents. Most of the thesis is then devoted to explaining the probabilistic simulation technique, adapted to CMOS VLSI digital circuits, and how it can be used to derive the required statistical descriptions of the current. This approach has been implemented in the program CREST, and has shown excellent accuracy and dramatic speedups compared to traditional approaches. We describe the probabilistic simulation technique and its implementation, and present the results of CREST runs on a variety of circuits.
Author: International Organisations Services
Publisher: IOS Press
ISBN: 9789051990317
Category : Business & Economics
Languages : en
Pages : 464
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