Measurement and Modeling of Transient Effects in Partially-depleted SOI MOSFET's PDF Download
Are you looking for read ebook online? Search for your book and save it on your Kindle device, PC, phones or tablets. Download Measurement and Modeling of Transient Effects in Partially-depleted SOI MOSFET's PDF full book. Access full book title Measurement and Modeling of Transient Effects in Partially-depleted SOI MOSFET's by Andy Wei. Download full books in PDF and EPUB format.
Author: Andy Wei
Publisher:
ISBN:
Category :
Languages : en
Pages : 152
Get Book Here
Book Description
Author: Andy Wei
Publisher:
ISBN:
Category :
Languages : en
Pages : 152
Get Book Here
Book Description
Author: Maryline Bawedin
Publisher: Presses univ. de Louvain
ISBN: 9782874630880
Category : Science
Languages : en
Pages : 176
Get Book Here
Book Description
Memory devices based on floating-body effects (FBE) in Silicon-on-Insulator (SOI) technology are among the most promising candidates for sub-100nm and low power Dynamic Random Access Memory (DRAM). This new type of DRAMs, called Zero-Capacitor RAM (Z-RAM), uses only one transistor in partially-depleted (PD) SOI technology and takes advantage of FBE which have been considered as parasitic phenomena until now. The Z-RAM programming principles are based on the threshold voltage VTH variations induced by the excess or lack of majority carriers in the floating body. In this dissertation, a new floating-body effect, the Transient Floating Body Potential Effect (TFBPE), based on the body majority carriers non-equilibrium and on the dual dynamic gate coupling in standard fully-depleted (FD) SOI MOSFETs is presented for the first time. The TFBPE occurs in a specific gate bias range and can induce strong hysteresis of the gate and drain current characteristics although the FD SOI transistors are usually known to be immune against the FBE and their aftermaths. Adapted from the same physics principles as in the drain current hysteresis, that we called the Meta-Stable Dip (MSD) effect, a new concept of one-transistor capacitor-less memory was also proposed, the Meta-Stable DRAM (MSDRAM) which is dedicated for double-gate operations. All the experimental results and physics interpretations were supported by 2D numerical simulations. A 1D semi-analytical model of the body potential for non-equilibrium states was also proposed. For the first time, this original body-potential model takes into account the majority carriers density variations, i.e., the quasi-Fermi level non-equilibrium versus a transient gate voltage scan in a FD MOS device.
Author: Michael L. Alles
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 218
Get Book Here
Book Description
Author: James B. Kuo
Publisher: John Wiley & Sons
ISBN: 0471464171
Category : Technology & Engineering
Languages : en
Pages : 424
Get Book Here
Book Description
A practical, comprehensive survey of SOI CMOS devices and circuitsfor microelectronics engineers The microelectronics industry is becoming increasingly dependent onSOI CMOS VLSI devices and circuits. This book is the first toaddress this important topic with a practical focus on devices andcircuits. It provides an up-to-date survey of the current knowledgeregarding SOI device behaviors and describes state-of-the-artlow-voltage CMOS VLSI analog and digital circuit techniques. Low-Voltage SOI CMOS VLSI Devices and Circuits covers the entirefield, from basic concepts to the most advanced ideas. Topicsinclude: * SOI device behavior: fundamental and floating body effects, hotcarrier effects, sensitivity, reliability, self-heating, breakdown,ESD, dual-gate devices, accumulation-mode devices, short channeleffects, and narrow channel effects * Low-voltage SOI digital circuits: floating body effects, DRAM,SRAM, static logic, dynamic logic, gate array, CPU, frequencydivider, and DSP * Low-voltage SOI analog circuits: op amps, filters, ADC/DAC,sigma-delta modulators, RF circuits, VCO, mixers, low-noiseamplifiers, and high-temperature circuits With over 300 references to the state of the art and over 300important figures on low-voltage SOI CMOS devices and circuits,this volume serves as an authoritative, reliable resource forengineers designing these circuits in high-tech industries.
Author: Anantha Chandrakasan
Publisher: John Wiley & Sons
ISBN: 0780334299
Category : Technology & Engineering
Languages : en
Pages : 656
Get Book Here
Book Description
This collection of important papers provides a comprehensive overview of low-power system design, from component technologies and circuits to architecture, system design, and CAD techniques. LOW POWER CMOS DESIGN summarizes the key low-power contributions through papers written by experts in this evolving field.
![Simulated Transient Behavior of Partially Depleted 0.18 [mu]m SOI N-MOSFET PDF](https://books.google.com/books/content/images/frontcover/XtkaHAAACAAJ?fife=w80-h100)
Author: Paul Vande Voorde
Publisher:
ISBN:
Category : Electron impact ionization
Languages : en
Pages : 2
Get Book Here
Book Description
Abstract: "2-D simulations are used to study the behavior of partially depleted SOI devices under transient conditions. The parameter of interest is the potential of the floating body (Vbody) which determines important device parameters such as threshold voltage and breakdown. Two phenomena govern Vbody: capacitive coupling of the body to the other nodes of the device and impact ionization currents generated near the drain. Capacitive coupling, particularly to the drain, affects Vbody during transients of arbitrarily short duration. On the other hand, impact ionization requires a finite body charging time to affect Vbody. This charging time due to impact ionization has been simulated and depends critically on the bias condition."
Author: Dimitris Tsoukalas
Publisher: Springer Science & Business Media
ISBN: 3709162440
Category : Technology & Engineering
Languages : en
Pages : 463
Get Book Here
Book Description
This volume contains the Proceedings of the International Conference on Simulation of Semiconductor Devices and Processes, SISPAD 01, held on September 5–7, 2001, in Athens. The conference provided an open forum for the presentation of the latest results and trends in process and device simulation. The trend towards shrinking device dimensions and increasing complexity in process technology demands the continuous development of advanced models describing basic physical phenomena involved. New simulation tools are developed to complete the hierarchy in the Technology Computer Aided Design simulation chain between microscopic and macroscopic approaches. The conference program featured 8 invited papers, 60 papers for oral presentation and 34 papers for poster presentation, selected from a total of 165 abstracts from 30 countries around the world. These papers disclose new and interesting concepts for simulating processes and devices.
Author: Peter L. F. Hemment
Publisher: The Electrochemical Society
ISBN: 9781566771535
Category : Science
Languages : en
Pages : 458
Get Book Here
Book Description
Author:
Publisher:
ISBN:
Category : Chemistry
Languages : en
Pages : 442
Get Book Here
Book Description
Author: James B. Kuo
Publisher: Springer Science & Business Media
ISBN: 1475728239
Category : Technology & Engineering
Languages : en
Pages : 455
Get Book Here
Book Description
Silicon-On-Insulator (SOI) CMOS technology has been regarded as another major technology for VLSI in addition to bulk CMOS technology. Owing to the buried oxide structure, SOI technology offers superior CMOS devices with higher speed, high density, and reduced second order effects for deep-submicron low-voltage, low-power VLSI circuits applications. In addition to VLSI applications, and because of its outstanding properties, SOI technology has been used to realize communication circuits, microwave devices, BICMOS devices, and even fiber optics applications. CMOS VLSI Engineering: Silicon-On-Insulator addresses three key factors in engineering SOI CMOS VLSI - processing technology, device modelling, and circuit designs are all covered with their mutual interactions. Starting from the SOI CMOS processing technology and the SOI CMOS digital and analog circuits, behaviors of the SOI CMOS devices are presented, followed by a CAD program, ST-SPICE, which incorporates models for deep-submicron fully-depleted mesa-isolated SOI CMOS devices and special purpose SOI devices including polysilicon TFTs. CMOS VLSI Engineering: Silicon-On-Insulator is written for undergraduate senior students and first-year graduate students interested in CMOS VLSI. It will also be suitable for electrical engineering professionals interested in microelectronics.
