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Author: Gehad Ismail Ibrahim Alkady
Publisher:
ISBN:
Category : Fault tolerance (Engineering)
Languages : en
Pages : 224
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Book Description
Abstract: One of the devices that play a great role in electronic circuits design, specifically safety-critical design applications, is Field programmable Gate Arrays (FPGAs). This is because of its high performance, re-configurability and low development cost. FPGAs are used in many applications such as data processing, networks, automotive, space and industrial applications. Negative impacts on the reliability of such applications result from moving to smaller feature sizes in the latest FPGA architectures. This increases the need for fault-tolerant techniques to improve reliability and extend system lifetime of FPGA-based applications. In this thesis, two fault-tolerant techniques for FPGA-based applications are proposed with a built-in fault detection region. A low cost fault detection scheme is proposed for detecting faults using the fault detection region used in both schemes. The fault detection scheme primarily detects open faults in the programmable interconnect resources in the FPGAs. In addition, Stuck-At faults and Single Event Upsets (SEUs) fault can be detected. For fault recovery, each scheme has its own fault recovery approach. The first approach uses a spare module and a 2-to-1 multiplexer to recover from any fault detected. On the other hand, the second approach recovers from any fault detected using the property of Partial Reconfiguration (PR) in the FPGAs. It relies on identifying a Partially Reconfigurable block (P_b) in the FPGA that is used in the recovery process after the first faulty module is identified in the system. This technique uses only one location to recover from faults in any of the FPGA's modules and the FPGA interconnects. Simulation results show that both techniques can detect and recover from open faults. In addition, Stuck-At faults and Single Event Upsets (SEUs) fault can also be detected. Finally, both techniques require low area overhead.
Author: Gehad Ismail Ibrahim Alkady
Publisher:
ISBN:
Category : Fault tolerance (Engineering)
Languages : en
Pages : 224
Get Book Here
Book Description
Abstract: One of the devices that play a great role in electronic circuits design, specifically safety-critical design applications, is Field programmable Gate Arrays (FPGAs). This is because of its high performance, re-configurability and low development cost. FPGAs are used in many applications such as data processing, networks, automotive, space and industrial applications. Negative impacts on the reliability of such applications result from moving to smaller feature sizes in the latest FPGA architectures. This increases the need for fault-tolerant techniques to improve reliability and extend system lifetime of FPGA-based applications. In this thesis, two fault-tolerant techniques for FPGA-based applications are proposed with a built-in fault detection region. A low cost fault detection scheme is proposed for detecting faults using the fault detection region used in both schemes. The fault detection scheme primarily detects open faults in the programmable interconnect resources in the FPGAs. In addition, Stuck-At faults and Single Event Upsets (SEUs) fault can be detected. For fault recovery, each scheme has its own fault recovery approach. The first approach uses a spare module and a 2-to-1 multiplexer to recover from any fault detected. On the other hand, the second approach recovers from any fault detected using the property of Partial Reconfiguration (PR) in the FPGAs. It relies on identifying a Partially Reconfigurable block (P_b) in the FPGA that is used in the recovery process after the first faulty module is identified in the system. This technique uses only one location to recover from faults in any of the FPGA's modules and the FPGA interconnects. Simulation results show that both techniques can detect and recover from open faults. In addition, Stuck-At faults and Single Event Upsets (SEUs) fault can also be detected. Finally, both techniques require low area overhead.
Author: Niccolò Battezzati
Publisher: Springer Science & Business Media
ISBN: 1441975950
Category : Technology & Engineering
Languages : en
Pages : 221
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Book Description
Embedded systems applications that are either mission or safety-critical usually entail low- to mid- production volumes, require the rapid development of specific tasks, which are typically computing intensive, and are cost bounded. The adoption of re-configurable FPGAs in such application domains is constrained to the availability of suitable techniques to guarantee the dependability requirements entailed by critical applications. This book describes the challenges faced by designers when implementing a mission- or safety-critical application using re-configurable FPGAs and it details various techniques to overcome these challenges. In addition to an overview of the key concepts of re-configurable FPGAs, it provides a theoretical description of the failure modes that can cause incorrect operation of re-configurable FPGA-based electronic systems. It also outlines analysis techniques that can be used to forecast such failures and covers the theory behind solutions to mitigate fault effects. This book also reviews current technologies available for building re-configurable FPGAs, specifically SRAM-based technology and Flash-based technology. For each technology introduced, theoretical concepts presented are applied to real cases. Design techniques and tools are presented to develop critical applications using commercial, off-the-shelf devices, such as Xilinx Virtex FPGAs, and Actel ProASIC FPGAs. Alternative techniques based on radiation hardened FPGAs, such as Xilinx SIRF and Atmel ATF280 are also presented. This publication is an invaluable reference for anyone interested in understanding the technologies of re-configurable FPGAs, as well as designers developing critical applications based on these technologies.
Author: Fernanda Kastensmidt
Publisher: Springer
ISBN: 3319143522
Category : Technology & Engineering
Languages : en
Pages : 319
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Book Description
This book introduces the concepts of soft errors in FPGAs, as well as the motivation for using commercial, off-the-shelf (COTS) FPGAs in mission-critical and remote applications, such as aerospace. The authors describe the effects of radiation in FPGAs, present a large set of soft-error mitigation techniques that can be applied in these circuits, as well as methods for qualifying these circuits under radiation. Coverage includes radiation effects in FPGAs, fault-tolerant techniques for FPGAs, use of COTS FPGAs in aerospace applications, experimental data of FPGAs under radiation, FPGA embedded processors under radiation and fault injection in FPGAs. Since dedicated parallel processing architectures such as GPUs have become more desirable in aerospace applications due to high computational power, GPU analysis under radiation is also discussed.
Author: David Powell
Publisher: Springer Science & Business Media
ISBN: 1475733534
Category : Computers
Languages : en
Pages : 249
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Book Description
The design of computer systems to be embedded in critical real-time applications is a complex task. Such systems must not only guarantee to meet hard real-time deadlines imposed by their physical environment, they must guarantee to do so dependably, despite both physical faults (in hardware) and design faults (in hardware or software). A fault-tolerance approach is mandatory for these guarantees to be commensurate with the safety and reliability requirements of many life- and mission-critical applications. This book explains the motivations and the results of a collaborative project', whose objective was to significantly decrease the lifecycle costs of such fault tolerant systems. The end-user companies participating in this project already deploy fault-tolerant systems in critical railway, space and nuclear-propulsion applications. However, these are proprietary systems whose architectures have been tailored to meet domain-specific requirements. This has led to very costly, inflexible, and often hardware-intensive solutions that, by the time they are developed, validated and certified for use in the field, can already be out-of-date in terms of their underlying hardware and software technology.
Author: Fernanda Lima Kastensmidt
Publisher: Springer Science & Business Media
ISBN: 038731069X
Category : Technology & Engineering
Languages : en
Pages : 193
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Book Description
This book reviews fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs), outlining many methods for designing fault tolerance systems. Some of these are based on new fault-tolerant architecture, and others on protecting the high-level hardware description before synthesis in the FPGA. The text helps the reader choose the best techniques project-by-project, and to compare fault tolerant techniques for programmable logic applications.
Author: Sébastien Gorelov
Publisher:
ISBN:
Category :
Languages : en
Pages : 92
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Book Description
The need for dependable real-time systems for embedded application is growing, and, at the same time, so does the amount of functionality required from these systems. As testing can only show the presence of errors, not their absence, higher levels of system dependability may be provided by the implementation of mechanisms that can protect the system from faults. We present a framework for the development of fault tolerant mission critical real-time systems that provides a structure for flexible, efficient and deterministic design. The framework leverages three key knowledge domains: firstly, a software concurrency model, the Ada Ravenscar Profile, which guarantees deterministic behavior; secondly, the design of a hardware scheduler, the RavenHaRT kernel, which further provides deadlock free inter-task communication management; and finally, the design of a hardware execution time monitor, the Monitoring Chip, which provides non-intrusive error detection. To increase service dependability, we propose a fault tolerance strategy that uses multiple operating modes to provide system-level handling of timing errors. The hierarchical set of operating modes offers different gracefully degraded levels of guaranteed service. This approach relies on the elements of the framework discussed above and is illustrated through a sample case study of a generic navigation system.
Author: Mengfei Yang
Publisher: John Wiley & Sons
ISBN: 1119107415
Category : Computers
Languages : en
Pages : 430
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Book Description
Comprehensive coverage of all aspects of space application oriented fault tolerance techniques • Experienced expert author working on fault tolerance for Chinese space program for almost three decades • Initiatively provides a systematic texts for the cutting-edge fault tolerance techniques in spacecraft control computer, with emphasis on practical engineering knowledge • Presents fundamental and advanced theories and technologies in a logical and easy-to-understand manner • Beneficial to readers inside and outside the area of space applications
Author: Chagun Basha Basheer Ahmed
Publisher:
ISBN:
Category :
Languages : en
Pages : 0
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Book Description
Reconfigurable Field Programmable Gate Arrays (FPGAs) are extensively employed in various application domains due to their flexibility, high-density functionality, high performance and low-cost development compared to ASICs (Application Specific Integrated Circuits). However, the challenge that must be tackled during system design is their high susceptibility to the radiation induced faults such as Single Event Effects (SEEs). These radiation induced faults are a major concern in safety and mission critical systems such as automotive and avionics systems. In general, most of today's COTS FPGAs are not designed to work under these harsh environments, except for specific circuits that have been radiation-hardened at the fabrication process level, but at a very high cost overhead, which makes them less interesting from an economic and performance point of view. The project ARDyT is aimed to develop a low-cost reliable FPGA architecture with supporting EDA tool-suite that offers a complete environment for a fault tolerant system design. This thesis work presents the proposed ARDyT FPGA architecture, which incorporates appropriate fault mitigation strategies at different levels. One of the main objectives of ARDyT project is to handle multi-bit upsets (MBUs) in the configuration bistream. Fault mitigation strategies to protect logic resources and configuration bitstream are discussed in detail. A fault-aware customized configurable logic block architecture is proposed to support logic resource fault mitigation strategy. A new built-in 3-Dimensional Hamming (3DH) error correcting scheme is proposed to handle MBUs in the configuration bitstream. The additional features introduced in this architecture ensure complete reliability with the help of centralized reliability manager named R3M (Run-time Reconfigurable Resource Manager), corresponding tool-suite and increased flexibility in the design.
Author: Louis Redding
Publisher: Springer
ISBN: 3319121111
Category : Technology & Engineering
Languages : en
Pages : 459
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Book Description
Demonstrating the latest research and analysis in the area of through-life engineering services (TES), this book utilizes case studies and expert analysis from an international array of practitioners and researchers – who together represent multiple manufacturing sectors: aerospace, railway and automotive – to maximize reader insights into the field of through-life engineering services. As part of the EPSRC Centre in Through-life Engineering Services program to support the academic and industrial community, this book presents an overview of non-destructive testing techniques and applications and provides the reader with the information needed to assess degradation and possible automation of through-life engineering service activities . The latest developments in maintenance-repair-overhaul (MRO) are presented with emphasis on cleaning technologies, repair and overhaul approaches and planning and digital assistance. The impact of these technologies on sustainable enterprises is also analyzed. This book will help to support the existing TES community and will provide future studies with a strong base from which to analyze and apply techn9olgical trends to real world examples.
Author: Mahtab Niknahad
Publisher: KIT Scientific Publishing
ISBN: 3731500388
Category : Technology & Engineering
Languages : en
Pages : 164
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Book Description
Nowadays using SRAM based FPGAs in space missions is increasingly considered due to their flexibility and reprogrammability. A challenge is the devices sensitivity to radiation effects that increased with modern architectures due to smaller CMOS structures. This work proposes fault tolerance methodologies, that are based on a fine grain view to modern reconfigurable architectures. The focus is on SEU mitigation challenges in SRAM based FPGAs which can result in crucial situations.
