Fault Detection in Combinational Networks Using the Boolean Difference

Fault Detection in Combinational Networks Using the Boolean Difference PDF Author: Michael Charles Oldham
Publisher:
ISBN:
Category : Algorithms
Languages : en
Pages : 212

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Fault Detection in Combinational Networks Using the Boolean Difference

Fault Detection in Combinational Networks Using the Boolean Difference PDF Author: Michael Charles Oldham
Publisher:
ISBN:
Category : Algorithms
Languages : en
Pages : 212

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Automatic Fault Detection of Combinational Logic Circuits Using the Partial Boolean Difference

Automatic Fault Detection of Combinational Logic Circuits Using the Partial Boolean Difference PDF Author: John B. Vitullo (Jr.)
Publisher:
ISBN:
Category : Logic circuits
Languages : en
Pages : 90

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Fault Detection in Combinational Circuits Using Boolean Differences

Fault Detection in Combinational Circuits Using Boolean Differences PDF Author: Rustom Khodadad Irani
Publisher:
ISBN:
Category : Electronic digital computers
Languages : en
Pages : 103

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Optimum Statistical Fault Detection in Combinational Circuits

Optimum Statistical Fault Detection in Combinational Circuits PDF Author: S. Amaranathan
Publisher:
ISBN:
Category :
Languages : en
Pages : 158

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Fault Diagnosis and Fault Tolerance

Fault Diagnosis and Fault Tolerance PDF Author: Tinghuai Chen
Publisher: Springer Science & Business Media
ISBN: 3642771793
Category : Computers
Languages : en
Pages : 207

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Book Description
With the rapid growth of integration scale of VLSI chips and the present need for reliable computers in space exploration, fault diagnosis and fault toleran ce have become more important than before, and hence reveal a lot of interest ing topics which attract many researchers to make a great number of contribu tions to this field. In recent years, many new and significant results have been achieved. A quick scan over the proceedings of the conferences on fault tolerant computing and design automation as well as on testing will convince the reader of that. But unfortunately these achievements have not been entire ly reflected in the textbooks, so that there seems to be a gap for the new researcher who already has the basic knowledge and wants to begin research in this area. As a remedy for this deficiency, this book is intended for begin ners, especially graduate students, as a textbook which will lead them to the frontier of some branches of the fault-tolerant computing field. The first chapter introduces the four-valued logic B4 and its applica tions. In 1966 Roth first proposed this four-valued logic as a technique to generate tests for logical circuits, but this work did not concern the mathe matical basis of B4 itself.

Test Generation for Detecting Multiple Stuck Faults in Synchronous Sequential Circuits Using Boolean Difference and Transition Matrix Techniques

Test Generation for Detecting Multiple Stuck Faults in Synchronous Sequential Circuits Using Boolean Difference and Transition Matrix Techniques PDF Author: Thiep V. Nguyen
Publisher:
ISBN:
Category :
Languages : en
Pages : 0

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Book Description
The Boolean difference is a mathematical concept which has proved its usefulness in the study of single and multiple stuck-at faults in combinational circuits. This tool of analysis was extended to cover multiple stuck-at faults in synchronous sequential circuits as well. In this dissertation, modifications to previous work are presented, together with the development of a new method for deriving the required shortest test sequence to detect a specified multiple fault. First, the vector Boolean difference technique is utilized to determine the input vector that will produce a difference in output between the fault-free and faulty circuits with both starting in the same initial state. If that detection cannot be achieved immediately, then the state transition matrices of both circuits are combined and used to form a matrix of detecting state pairs. Each of these pairs comprises of the present states of both circuits for which an output difference will be detected by an input vector. The detecting tree is then built leading the two circuits from the same initial state to the first detecting state found to complete the search for the shortest test sequence. Besides being able to identify, at an early stage, faults that are undetectable, this algorithm guarantees the generation of a shortest test sequence, if one exists, for every multiple stuck-at fault in a synchronous sequential circuit having a synchronizing sequence or a known initial state. A computer program was also written as a tool to automatically generate test sequences for detecting single or multiple faults in both combinational and synchronous sequential circuits.

Rational Fault Analysis

Rational Fault Analysis PDF Author: Richard Saeks
Publisher: Marcel Dekker
ISBN:
Category : Business & Economics
Languages : en
Pages : 264

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Book Description
Information on the development of rational procedures for detection, location, & prediction of faults in a variety of systems. Includes a chapter on computer-aided fault analysis.

Fault Detection Through Parallel Processing in Boolean Algebra

Fault Detection Through Parallel Processing in Boolean Algebra PDF Author: Donnamaie E. White
Publisher:
ISBN:
Category : Algebra, Boolean
Languages : en
Pages : 142

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Book Description
This presentation is an overview of the research in progress on fault detection methods for circuits, both combinational circuits and sequential circuits. A summary of some of the existing techniques for minimal test set generation is followed by an introduction to the concept and theory of a minimal test sequence as a new approach for fault detection in combinational circuits. A detailed explanation of Triadic Graph Theory is followed by a summary of the existing techniques for parallel processing in Boolean Algebra. The main contribution of this paper is the extension of the applications of the Boolean Analyzer to the generation of: (1) Boolean Differences; (2) 'stuck-at' fault tests for a circuit (similar to those generated by Roth's D-Algorithm); and (3) the Test Sequence(s) of a circuit.

Boolean Difference Approach for Fault Detection

Boolean Difference Approach for Fault Detection PDF Author: Suresh Nihalani
Publisher:
ISBN:
Category : Electric fault location
Languages : en
Pages : 93

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Observer Design for Control and Fault Diagnosis of Boolean Networks

Observer Design for Control and Fault Diagnosis of Boolean Networks PDF Author: Zhihua Zhang
Publisher: Springer Nature
ISBN: 3658359293
Category : Technology & Engineering
Languages : en
Pages : 177

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Book Description
Boolean control networks (BCNs) are a kind of parameter-free model, which can be used to approximate the qualitative behavior of biological systems. After converting into a model similar to the standard discrete-time state-space model, control-theoretic problems of BCNs can be studied. In control theory, state observers can provide state estimation for any other applications. Reconstructibility condition is necessary for the existence of state observers. In this thesis explicit and recursive methods have been developed for reconstructibility analysis. Then, an approach to design Luenberger-like observer has been proposed, which works in a two-step process (i.e. predict and update). If a BCN is reconstructible, then an accurate state estimate can be provided by the observer no later than the minimal reconstructibility index. For a wide range of applications the approach has been extended to enable design of unknown input observer, distributed observers and reduced-order observer. The performance of the observers has been evaluated thoroughly. Furthermore, methods for output tracking control and fault diagnosis of BCNs have been developed. Finally, the developed schemes are tested with numerical examples.