Author: Jawahar Bhikhalal Shah
Publisher:
ISBN:
Category : Computers
Languages : en
Pages : 58
Book Description
Fault Detection and Fault Diagnosis Tests for Combinational Networks
Author: Jawahar Bhikhalal Shah
Publisher:
ISBN:
Category : Computers
Languages : en
Pages : 58
Book Description
Publisher:
ISBN:
Category : Computers
Languages : en
Pages : 58
Book Description
Fault Detection Tests for Combinational Logic Networks
Author: Daniel Charles Scavezze
Publisher:
ISBN:
Category :
Languages : en
Pages : 162
Book Description
Publisher:
ISBN:
Category :
Languages : en
Pages : 162
Book Description
Fault Detection and Diagnosis in Combinational Circuits
Author: Bhakta Kumar Roy
Publisher:
ISBN:
Category : Combinatorial analysis
Languages : en
Pages : 338
Book Description
Two approaches to detection and diagnosis of single-gate failures are presented. One is an algebraic approach which derives minimal test sets by iterative intersections of higher dimensional cubes representing tests and the other is a tabular method that requires use of diagnostic tables. A diagnostic table lists gate sensitivities and network primary output values, with and without the failures present, for all possible inputs to the network. This information is used to locate a faulty gate and describe its failed function. Techniques for deriving minimal test sets and adaptive test schedules from diagnostic tables are also derived. The application of diagnostic tables to the deprivation of equivalence classes of faults in combinational networks is presented. A synthesis technique using diagnostic tables is also derived. The problem of diagnosable synthesis of combinational nets is considered. (Author).
Publisher:
ISBN:
Category : Combinatorial analysis
Languages : en
Pages : 338
Book Description
Two approaches to detection and diagnosis of single-gate failures are presented. One is an algebraic approach which derives minimal test sets by iterative intersections of higher dimensional cubes representing tests and the other is a tabular method that requires use of diagnostic tables. A diagnostic table lists gate sensitivities and network primary output values, with and without the failures present, for all possible inputs to the network. This information is used to locate a faulty gate and describe its failed function. Techniques for deriving minimal test sets and adaptive test schedules from diagnostic tables are also derived. The application of diagnostic tables to the deprivation of equivalence classes of faults in combinational networks is presented. A synthesis technique using diagnostic tables is also derived. The problem of diagnosable synthesis of combinational nets is considered. (Author).
Optimum Statistical Fault Detection in Combinational Circuits
Author: S. Amaranathan
Publisher:
ISBN:
Category :
Languages : en
Pages : 158
Book Description
Publisher:
ISBN:
Category :
Languages : en
Pages : 158
Book Description
Automated Multiple Fault Test Generation for Combinational Networks
Author: Robert A. Hendrix
Publisher:
ISBN:
Category :
Languages : en
Pages : 156
Book Description
This report deals with multiple fault detection in combinational logic networks; the faults considered are those which may be represented by one or more lines stuck at logic value 0 or 1. Some new theorems and rules are presented which aid in the identification of masking faults, and an algorithm is developed which produces multiple fault detection test sets for single-output combinational logic networks. The algorithm uses a path sensitizing technique to generate tests for members of a set of prime faults; any network fault can be represented by a combination of faults from the prime fault set, and a test which detects all combinations of prime faults will detect any single or multiple fault in the network. A modified version of the algorithm is implemented in the FORTRAN computer programming language; the automated version produces test sets which are optimal or near-optimal and usually complete. In the test generation process, certain redundancies are also detected.
Publisher:
ISBN:
Category :
Languages : en
Pages : 156
Book Description
This report deals with multiple fault detection in combinational logic networks; the faults considered are those which may be represented by one or more lines stuck at logic value 0 or 1. Some new theorems and rules are presented which aid in the identification of masking faults, and an algorithm is developed which produces multiple fault detection test sets for single-output combinational logic networks. The algorithm uses a path sensitizing technique to generate tests for members of a set of prime faults; any network fault can be represented by a combination of faults from the prime fault set, and a test which detects all combinations of prime faults will detect any single or multiple fault in the network. A modified version of the algorithm is implemented in the FORTRAN computer programming language; the automated version produces test sets which are optimal or near-optimal and usually complete. In the test generation process, certain redundancies are also detected.
Fault Diagnosis of Digital Circuits
Author: V. N. Yarmolik
Publisher: John Wiley & Sons
ISBN:
Category : Technology & Engineering
Languages : en
Pages : 216
Book Description
The continual explosion of computer development has led to inadequate coverage of proper & useful on-line testing techniques. This text fills the gap in the literature by presenting the latest techniques available for digital devices used in the most popular computers. Initial chapters explore the classic problems of on-line testing, pointing out the limited applications of conventional approaches to the problem of diagnosing digital devices using LSI & VLSI chips. Chapters 4-7 cover compact testing methods used to diagnose complex digital circuits. Chapters 8 & 9 analyze the techniques of compressing output responses of a digital circuit, while chapter 10 surveys promising recent signature generation techniques for binary sequences. The final chapter covers multi-output digital circuits.
Publisher: John Wiley & Sons
ISBN:
Category : Technology & Engineering
Languages : en
Pages : 216
Book Description
The continual explosion of computer development has led to inadequate coverage of proper & useful on-line testing techniques. This text fills the gap in the literature by presenting the latest techniques available for digital devices used in the most popular computers. Initial chapters explore the classic problems of on-line testing, pointing out the limited applications of conventional approaches to the problem of diagnosing digital devices using LSI & VLSI chips. Chapters 4-7 cover compact testing methods used to diagnose complex digital circuits. Chapters 8 & 9 analyze the techniques of compressing output responses of a digital circuit, while chapter 10 surveys promising recent signature generation techniques for binary sequences. The final chapter covers multi-output digital circuits.
Comprehensive Fault Diagnosis of Combinational Circuits
Author: David B. Lavo
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 278
Book Description
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 278
Book Description
Rational Fault Analysis
Author: Richard Saeks
Publisher: Marcel Dekker
ISBN:
Category : Business & Economics
Languages : en
Pages : 264
Book Description
Information on the development of rational procedures for detection, location, & prediction of faults in a variety of systems. Includes a chapter on computer-aided fault analysis.
Publisher: Marcel Dekker
ISBN:
Category : Business & Economics
Languages : en
Pages : 264
Book Description
Information on the development of rational procedures for detection, location, & prediction of faults in a variety of systems. Includes a chapter on computer-aided fault analysis.
Multiple Fault Diagnosis in Combinational Networks
Author: Charles Wei-Yuan Cha
Publisher:
ISBN:
Category :
Languages : en
Pages : 114
Book Description
A new concept, the prime fault, is introduced for the study of multiple fault diagnosis in combinational logic networks. It is shown that every multiple fault in a network can be represented by a functionally equivalent fault with prime faults as its only components. The use of prime faults greatly simplifies multiple fault analysis and test generation.
Publisher:
ISBN:
Category :
Languages : en
Pages : 114
Book Description
A new concept, the prime fault, is introduced for the study of multiple fault diagnosis in combinational logic networks. It is shown that every multiple fault in a network can be represented by a functionally equivalent fault with prime faults as its only components. The use of prime faults greatly simplifies multiple fault analysis and test generation.
Digital Circuit Testing and Testability
Author: Parag K. Lala
Publisher: Academic Press
ISBN: 9780124343306
Category : Computers
Languages : en
Pages : 222
Book Description
An easy to use introduction to the practices and techniques in the field of digital circuit testing. Lala writes in a user-friendly and tutorial style, making the book easy to read, even for the newcomer to fault-tolerant system design. Each informative chapter is self-contained, with little or no previous knowledge of a topic assumed. Extensive references follow each chapter.
Publisher: Academic Press
ISBN: 9780124343306
Category : Computers
Languages : en
Pages : 222
Book Description
An easy to use introduction to the practices and techniques in the field of digital circuit testing. Lala writes in a user-friendly and tutorial style, making the book easy to read, even for the newcomer to fault-tolerant system design. Each informative chapter is self-contained, with little or no previous knowledge of a topic assumed. Extensive references follow each chapter.