Efficient Analysis, Design and Decoding of Low-density Parity-check Codes [microform]

Efficient Analysis, Design and Decoding of Low-density Parity-check Codes [microform] PDF Author: Masoud Ardakani
Publisher: Library and Archives Canada = Bibliothèque et Archives Canada
ISBN: 9780612943100
Category :
Languages : en
Pages : 308

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Book Description
This dissertation presents new methods for the analysis, design and decoding of low-density parity-check (LDPC) codes. We start by studying the simplest class of decoders: the binary message-passing (BMP) decoders. We show that the optimum BMP decoder must satisfy certain symmetry and isotropy conditions, and prove that Gallager's Algorithm B is the optimum BMP algorithm. We use a generalization of extrinsic information transfer (EXIT) charts to formulate a linear program that leads to the design of highly efficient irregular LDPC codes for the BMP decoder. We extend this approach to the design of irregular LDPC codes for the additive white Gaussian noise channel. We introduce a "semi-Gaussian" approximation that very accurately predicts the behaviour of the decoder and permits code design over a wider range of rates and code parameters than in previous approaches. We then study the EXIT chart properties of the highest rate LDPC code which guarantees a certain convergence behaviour. We also introduce and analyze gear-shift decoding in which the decoder is permitted to select the decoding rule from among a predefined set. We show that this flexibility can give rise to significant reductions in decoding complexity. Finally, we show that binary LDPC codes can be combined with quadrature amplitude modulation to achieve near-capacity performance in a multitone system over frequency selective Gaussian channels.

Efficient Analysis, Design and Decoding of Low-density Parity-check Codes [microform]

Efficient Analysis, Design and Decoding of Low-density Parity-check Codes [microform] PDF Author: Masoud Ardakani
Publisher: Library and Archives Canada = Bibliothèque et Archives Canada
ISBN: 9780612943100
Category :
Languages : en
Pages : 308

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Book Description
This dissertation presents new methods for the analysis, design and decoding of low-density parity-check (LDPC) codes. We start by studying the simplest class of decoders: the binary message-passing (BMP) decoders. We show that the optimum BMP decoder must satisfy certain symmetry and isotropy conditions, and prove that Gallager's Algorithm B is the optimum BMP algorithm. We use a generalization of extrinsic information transfer (EXIT) charts to formulate a linear program that leads to the design of highly efficient irregular LDPC codes for the BMP decoder. We extend this approach to the design of irregular LDPC codes for the additive white Gaussian noise channel. We introduce a "semi-Gaussian" approximation that very accurately predicts the behaviour of the decoder and permits code design over a wider range of rates and code parameters than in previous approaches. We then study the EXIT chart properties of the highest rate LDPC code which guarantees a certain convergence behaviour. We also introduce and analyze gear-shift decoding in which the decoder is permitted to select the decoding rule from among a predefined set. We show that this flexibility can give rise to significant reductions in decoding complexity. Finally, we show that binary LDPC codes can be combined with quadrature amplitude modulation to achieve near-capacity performance in a multitone system over frequency selective Gaussian channels.

Low-density Parity-check Codes with Reduced Decoding Complexity

Low-density Parity-check Codes with Reduced Decoding Complexity PDF Author: Benjamin Smith
Publisher:
ISBN: 9780494273289
Category :
Languages : en
Pages : 156

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Book Description
This thesis presents new methods to design low-density parity-check (LDPC) codes with reduced decoding complexity. An accurate measure of iterative decoding complexity is introduced. In conjunction with extrinsic information transfer (EXIT) chart analysis, an efficient optimization program is developed, for which the complexity measure is the objective function, and its utility is demonstrated by designing LDPC codes with reduced decoding complexity. For long block lengths, codes designed by these methods match the performance of threshold-optimized codes, but reduce the decoding complexity by approximately one-third. The performance of LDPC codes is investigated when the decoder is constrained to perform a sub-optimal decoding algorithm. Due to their practical relevance, the focus is on the design of LDPC codes for quantized min-sum decoders. For such a decoder, codes designed for the sum-product algorithm are sub-optimal, and an alternative design strategy is proposed, resulting in gains of more than 0.5 dB.

Efficient Design and Decoding of the Rate-compatible Low-density Parity-check Codes

Efficient Design and Decoding of the Rate-compatible Low-density Parity-check Codes PDF Author:
Publisher:
ISBN:
Category :
Languages : en
Pages :

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Book Description
HKUST Call Number: Thesis ECED 2009 WuXX.

Energy-efficient Decoding of Low-density Parity-check Codes

Energy-efficient Decoding of Low-density Parity-check Codes PDF Author: Kevin Cushon
Publisher:
ISBN:
Category :
Languages : en
Pages :

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Book Description
"Low-density parity-check (LDPC) codes are a type of error correcting code that are frequently used in high-performance communications systems, due to their ability to approach the theoretical limits of error correction. However, their iterative soft-decision decoding algorithms suffer from high computational complexity, energy consumption, and auxiliary circuit implementation difficulties. It is of particular interest to develop energy-efficient LDPC decoders in order to decrease cost of operation, increase battery life in portable devices, lessen environmental impact, and increase the range of applications for these powerful codes.In this dissertation, we propose four new LDPC decoder designs with the primary goal of improving energy efficiency over previous designs. First, we present a bidirectional interleaver based on transmission gates, which reduces wiring complexity and associated parasitic energy losses. Second, we present an iterative decoder design based on pulse-width modulated min-sum (PWM-MS). We demonstrate that the pulse width message format reduces switching activity, computational complexity, and energy consumption compared to other recent LDPC decoder designs. Third, wepresent decoders based on differential binary (DB) algorithms. We also propose an improved differential binary (IDB) decoding algorithm, which greatly increases throughput and reduces energy consumption compared to recent decoders ofsimilar error correction capability. Finally, we present decoders based on gear-shift algorithms, which use multiple decoding rules to minimize energy consumption. We propose gear-shift pulse-width (GSP) and IDB with GSP (IGSP) algorithms, and demonstrate that they achieve superior energy efficiency without compromising error correction performance." --

Design of Rate-compatible Structured Low-density Parity-check Codes

Design of Rate-compatible Structured Low-density Parity-check Codes PDF Author: Jaehong Kim
Publisher:
ISBN:
Category : Algorithms
Languages : en
Pages :

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Book Description
The main objective of our research is to design practical low-density parity-check (LDPC) codes which provide a wide range of code rates in a rate-compatible fashion. To this end, we first propose a rate-compatible puncturing algorithm for LDPC codes at short block lengths (up to several thousand symbols). The proposed algorithm is based on the claim that a punctured LDPC code with a smaller level of recoverability has better performance. The proposed algorithm is verified by comparing performance of intentionally punctured LDPC codes (using the proposed algorithm) with randomly punctured LDPC codes. The intentionally punctured LDPC codes show better bit error rate (BER) performances at practically short block lengths. Even though the proposed puncturing algorithm shows excellent performance, several problems are still remained for our research objective. First, how to design an LDPC code of which structure is well suited for the puncturing algorithm. Second, how to provide a wide range of rates since there is a puncturing limitation with the proposed puncturing algorithm. To attack these problems, we propose a new class of LDPC codes, called efficiently-encodable rate-compatible (E2RC) codes, in which the proposed puncturing algorithm concept is imbedded. The E2RC codes have several strong points. First, the codes can be efficiently encoded. We present low-complexity encoder implementation with shift-register circuits. In addition, we show that a simple erasure decoder can also be used for the linear-time encoding of these codes. Thus, we can share a message-passing decoder for both encoding and decoding in transceiver systems that require an encoder/decoder pair. Second, we show that the non-systematic parts of the parity-check matrix are cycle-free, which ensures good code characteristics. Finally, the E2RC codes having a systematic rate-compatible puncturing structure show better puncturing performance than any other LDPC codes in all ranges of code rates.

Low-density Parity-check Codes for Gilbert-Elliott and Markov-modulated Channels [microform]

Low-density Parity-check Codes for Gilbert-Elliott and Markov-modulated Channels [microform] PDF Author: Andrew William Eckford
Publisher: National Library of Canada = Bibliothèque nationale du Canada
ISBN: 9780612916142
Category :
Languages : en
Pages : 328

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Book Description
The problem of low-density parity-check (LDPC) decoding in channels with memory has been attracting increasing attention in the literature. In this thesis, we use LDPC codes in an estimation-decoding scheme for the Gilbert-Elliott (GE) channel and more general Markov-modulated channels. The major accomplishments of this thesis include both analysis and design components. To analyze our estimation-decoding scheme, we derive density evolution for the GE channel, which has previously been used largely in memoryless channels. Furthermore, we develop techniques that use density evolution results to more efficiently characterize the space of Markov-modulated parameters. We begin by applying a characterization to the GE channel, following which we generalize this characterization into a partial ordering of Markov-modulated channels in terms of probability of symbol error. We also consider the design problem of developing LDPC degree sequences that are optimized for the GE channel. We obtain a novel design tool that approximates density evolution for our estimation-decoding algorithm, and present degree sequences that represent the best known codes in the GE channel. We also present a method of generalizing this tool to Markov-modulated channels, and give some of the first optimized degree sequences ever obtained for these channels.

Efficient Encoding and Decoding of Low Density Parity Check Codes

Efficient Encoding and Decoding of Low Density Parity Check Codes PDF Author: Hemanth Reddy Chintalapani
Publisher:
ISBN:
Category : Telecommunication
Languages : en
Pages : 48

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Book Description


Iterative Error Correction

Iterative Error Correction PDF Author: Sarah J. Johnson
Publisher: Cambridge University Press
ISBN: 0521871484
Category : Computers
Languages : en
Pages : 356

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Book Description
Presents all of the key ideas needed to understand, design, implement and analyse iterative-based error correction schemes.

Low Density Parity Check Code for Next Generation Communication System

Low Density Parity Check Code for Next Generation Communication System PDF Author: Mayank Ardeshana
Publisher: LAP Lambert Academic Publishing
ISBN: 9783845420417
Category :
Languages : en
Pages : 72

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Book Description
Channel coding provides the means of patterning signals so as to reduce their energy or bandwidth consumption for a given error performance. LDPC codes have been shown to have good error correcting performance which enables efficient and reliable communication. LDPC codes have linear decoding complexity but performance approaching close to shannon capacity with iterative probabilistic decoding algorithm. In this dissertation, the performance of different error correcting code such as convolution, Reed Solomon(RS), hamming, block code are evaluated based on different parameters like code rate, bit error rate (BER), Eb/No, complexity, coding gain and compare with LDPC code. In general, message passing algorithm and the sum-product algorithm are used to decode the message. We showed that logarithmic sum-product algorithm with long block length code reduces multiplication to addition by introducing logarithmic likelihood ratio so that it achieves the highest BER performance among all the decoding algorithms. The astonishing performance combined with proposed modified MS decoding algorithm make these codes very attractive for the next generations digital broadcasting system (ABS - S).

High-Performance Decoder Architectures For Low-Density Parity-Check Codes

High-Performance Decoder Architectures For Low-Density Parity-Check Codes PDF Author: Kai Zhang
Publisher:
ISBN:
Category :
Languages : en
Pages : 244

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Book Description
Abstract: The Low-Density Parity-Check (LDPC) codes, which were invented by Gallager back in 1960s, have attracted considerable attentions recently. Compared with other error correction codes, LDPC codes are well suited for wireless, optical, and magnetic recording systems due to their near- Shannon-limit error-correcting capacity, high intrinsic parallelism and high-throughput potentials. With these remarkable characteristics, LDPC codes have been adopted in several recent communication standards such as 802.11n (Wi-Fi), 802.16e (WiMax), 802.15.3c (WPAN), DVB-S2 and CMMB. This dissertation is devoted to exploring efficient VLSI architectures for high-performance LDPC decoders and LDPC-like detectors in sparse inter-symbol interference (ISI) channels. The performance of an LDPC decoder is mainly evaluated by area efficiency, error-correcting capability, throughput and rate flexibility. With this work we investigate tradeoffs between the four performance aspects and develop several decoder architectures to improve one or several performance aspects while maintaining acceptable values for other aspects ... Layered decoding algorithm, which is popular in LDPC decoding, is also adopted in this paper. Simulation results show that the layered decoding doubles the convergence speed of the iterative belief propagation process. Exploring the special structure of the connections between the check nodes and the variable nodes on the factor graph, we propose an effective detector architecture for generic sparse ISI channels to facilitate the practical application of the proposed detection algorithm. The proposed architecture is also reconfigurable in order to switch flexible connections on the factor graph in the time-varying ISI channels.