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Author: Karthikeyan Reddy
Publisher:
ISBN:
Category : Analog-to-digital converters
Languages : en
Pages : 79
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Book Description
VCO-based ADCs have recently emerged as attractive alternative to conventional Delta Sigma modulator architectures. Few salient features of a VCObased ADC are: 1) the quantization noise is 1st order noise shaped, 2) it is an open loop architecture, and, 3) its implementation is mostly digital in nature. Hence, they are ideally suited for oversampled data converter techniques with the capability to operate at near GHz frequencies. However, their performance is severely limited by the non-linearity of the voltage to frequency transfer curve. Also, when operating at GHz frequencies, the excess loop delay (ELD) of a continuous-time [delta sigma] modulator can be a large fraction of the sampling period, thereby affecting the of stability of the modulator. In this work, two new architectures are proposed to overcome the above mentioned drawbacks. In the first approach, a continuous-time Delta Sigma modulator incorporates a non-linear VCO as the second stage in a 2-stage residue canceling quantizer (RCQ) and mitigates the impact of its non-linearity by spanning only a small region of the VCOs tuning curve. In the second approach, both phase and frequency domain information are extracted from the VCO and fedback, which provides an extra clock cycle delay in the feeback path. This relaxes the timing constraints for the modulator, allowing it to be clocked at GHz frequencies.
Author: Karthikeyan Reddy
Publisher:
ISBN:
Category : Analog-to-digital converters
Languages : en
Pages : 79
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Book Description
VCO-based ADCs have recently emerged as attractive alternative to conventional Delta Sigma modulator architectures. Few salient features of a VCObased ADC are: 1) the quantization noise is 1st order noise shaped, 2) it is an open loop architecture, and, 3) its implementation is mostly digital in nature. Hence, they are ideally suited for oversampled data converter techniques with the capability to operate at near GHz frequencies. However, their performance is severely limited by the non-linearity of the voltage to frequency transfer curve. Also, when operating at GHz frequencies, the excess loop delay (ELD) of a continuous-time [delta sigma] modulator can be a large fraction of the sampling period, thereby affecting the of stability of the modulator. In this work, two new architectures are proposed to overcome the above mentioned drawbacks. In the first approach, a continuous-time Delta Sigma modulator incorporates a non-linear VCO as the second stage in a 2-stage residue canceling quantizer (RCQ) and mitigates the impact of its non-linearity by spanning only a small region of the VCOs tuning curve. In the second approach, both phase and frequency domain information are extracted from the VCO and fedback, which provides an extra clock cycle delay in the feeback path. This relaxes the timing constraints for the modulator, allowing it to be clocked at GHz frequencies.
Author: Vishnu Unnikrishnan
Publisher: Linköping University Electronic Press
ISBN: 9176856240
Category :
Languages : en
Pages : 52
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Book Description
Today's complex electronic systems with billions of transistors on a single die are enabled by the aggressive scaling down of the device feature size at an exponential rate as predicted by the Moore's law. Digital circuits benefit from technology scaling to become faster, more energy efficient as well as more area efficient as the feature size is scaled down. Moreover, digital design also benefits from mature CAD tools that simplify the design and cross-technology porting of complex systems, leveraging on a cell-based design methodology. On the other hand, the design of analog circuits is getting increasingly difficult as the feature size scales down into the deep nanometer regime due to a variety of reasons like shrinking voltage headroom, reducing intrinsic gain of the devices, increasing noise coupling between circuit nodes due to shorter distances etc. Furthermore, analog circuits are still largely designed with a full custom design ow that makes their design and porting tedious, slow, and expensive. In this context, it is attractive to consider realizing analog/mixed-signal circuits using standard digital components. This leads to scaling-friendly mixed-signal blocks that can be designed and ported using the existing CAD framework available for digital design. The concept is already being applied to mixed-signal components like frequency synthesizers where all-digital architectures are synthesized using standard cells as basic components. This can be extended to other mixed-signal blocks like digital-to-analog and analog to- digital converters as well, where the latter is of particular interest in this thesis. A voltage-controlled oscillator (VCO)-based analog-to-digital converter (ADC) is an attractive architecture to achieve all-digital analog-to digital conversion due to favorable properties like shaping of the quantization error, inherent anti-alias filtering etc. Here a VCO operates as a signal integrator as well as a quantizer. A converter employing a ring oscillator as the VCO lends itself to an all-digital implementation. In this dissertation, we explore the design of VCO-based ADCs synthesized using digital standard cells with the long-term goal of achieving high performance data converters built from low accuracy switch components. In a first step, an ADC is designed using vendor supplied standard cells and fabricated in a 65 nm CMOS process. The converter delivers an 8-bit ENOB over a 25 MHz bandwidth while consuming 3.3 mW of power resulting in an energy efficiency of 235 fJ/step (Walden FoM). Then we utilize standard digital CAD tools to synthesize converter designs that are fully described using a hardware description language. A polynomial-based digital post-processing scheme is proposed to correct for the VCO nonlinearity. In addition, pulse modulation schemes like delta modulation and asynchronous sigma-delta modulation are used as a signal pre-coding scheme, in an attempt to reduce the impact of VCO nonlinearity on converter performance. In order to investigate the scaling benefits of all-digital data conversion, a VCO-based converter is designed in a 28 nm CMOS process. The design delivers a 13.4-bit ENOB over a 5 MHz bandwidth achieving an energy efficiency of 4.3 fJ/step according to post-synthesis schematic simulation, indicating that such converters have the potential of achieving good performance in deeply scaled processes by exploiting scaling benefits. Furthermore, large conversion errors caused by non-ideal sampling of the oscillator phase are studied. An encoding scheme employing ones counters is proposed to code the sampled ring oscillator output into a number, which is resilient to a class of sampling induced errors modeled by temporal reordering of the transitions in the ring. The proposed encoding reduces the largest error caused by random reordering of up to six subsequent bits in the sampled signal from 31 to 2 LSBs. Finally, the impact of process, voltage, and temperature (PVT) variations on the performance while operating the converter from a subthreshold supply is investigated. PVT-adaptive solutions are suggested as a means to achieve energy-efficient operation over a wide range of PVT conditions.
Author: George I. Bourdopoulos
Publisher: Imperial College Press
ISBN: 9781848161214
Category : Science
Languages : en
Pages : 264
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Book Description
This important book deals with the modeling and design of higher-order single-stage delta-sigma modulators. It provides an overview of the architectures, the quantizer models, the design techniques and the implementation issues encountered in the study of the delta-sigma modulators. A number of applications are discussed, with emphasis on use in the design of analog-to-digital converters and in frequency synthesis. The book is education- rather than research-oriented, containing numerical examples and unsolved problems. It is aimed at introducing the final-year undergraduate, the graduate student or the electronic engineer to this field. Contents: Analog to Digital Conversion; ou Modulators OCo Architectures; Single-Bit Single-Stage ou Modulators, Modeling and Design; Implementation of ou Modulators; Practical Limitations of ou Modulators; Stabilization and Suppression of Tones for the Higher-Order Single-Stage ou Modulators; Decimation, Interpolation and Converters; Applications. Readership: Final-year undergraduates; graduate students; electrical, electronic and systems engineers."
Author: Qiyuan Liu
Publisher: Springer
ISBN: 3319772252
Category : Technology & Engineering
Languages : en
Pages : 215
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Book Description
This book describes a circuit architecture for converting real analog signals into a digital format, suitable for digital signal processors. This architecture, referred to as multi-stage noise-shaping (MASH) Continuous-Time Sigma-Delta Modulators (CT-ΔΣM), has the potential to provide better digital data quality and achieve better data rate conversion with lower power consumption. The authors not only cover MASH continuous-time sigma delta modulator fundamentals, but also provide a literature review that will allow students, professors, and professionals to catch up on the latest developments in related technology.
Author: Muhammed Bolatkale
Publisher: Springer
ISBN: 3319058401
Category : Technology & Engineering
Languages : en
Pages : 135
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Book Description
This book describes techniques for realizing wide bandwidth (125MHz) over-sampled analog-to-digital converters (ADCs) in nano meter-CMOS processes. The authors offer a clear and complete picture of system level challenges and practical design solutions in high-speed Delta-Sigma modulators. Readers will be enabled to implement ADCs as continuous-time delta-sigma (CT∆Σ) modulators, offering simple resistive inputs, which do not require the use of power-hungry input buffers, as well as offering inherent anti-aliasing, which simplifies system integration. The authors focus on the design of high speed and wide-bandwidth ΔΣMs that make a step in bandwidth range which was previously only possible with Nyquist converters. More specifically, this book describes the stability, power efficiency and linearity limits of ΔΣMs, aiming at a GHz sampling frequency.
Author: Jose M. de la Rosa
Publisher: John Wiley & Sons
ISBN: 1118568435
Category : Technology & Engineering
Languages : en
Pages : 463
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Book Description
A comprehensive overview of Sigma-Delta Analog-to-Digital Converters (ADCs) and a practical guide to their design in nano-scale CMOS for optimal performance. This book presents a systematic and comprehensive compilation of sigma-delta converter operating principles, the new advances in architectures and circuits, design methodologies and practical considerations − going from system-level specifications to silicon integration, packaging and measurements, with emphasis on nanometer CMOS implementation. The book emphasizes practical design issues – from high-level behavioural modelling in MATLAB/SIMULINK, to circuit-level implementation in Cadence Design FrameWork II. As well as being a comprehensive reference to the theory, the book is also unique in that it gives special importance on practical issues, giving a detailed description of the different steps that constitute the whole design flow of sigma-delta ADCs. The book begins with an introductory survey of sigma-delta modulators, their fundamentals architectures and synthesis methods covered in Chapter 1. In Chapter 2, the effect of main circuit error mechanisms is analysed, providing the necessary understanding of the main practical issues affecting the performance of sigma-delta modulators. The knowledge derived from the first two chapters is presented in the book as an essential part of the systematic top-down/bottom-up synthesis methodology of sigma-delta modulators described in Chapter 3, where a time-domain behavioural simulator named SIMSIDES is described and applied to the high-level design and verification of sigma-delta ADCs. Chapter 4 moves farther down from system-level to the circuit and physical level, providing a number of design recommendations and practical recipes to complete the design flow of sigma-delta modulators. To conclude the book, Chapter 5 gives an overview of the state-of-the-art sigma-delta ADCs, which are exhaustively analysed in order to extract practical design guidelines and to identify the incoming trends, design challenges as well as practical solutions proposed by cutting-edge designs. Offers a complete survey of sigma-delta modulator architectures from fundamentals to state-of-the art topologies, considering both switched-capacitor and continuous-time circuit implementations Gives a systematic analysis and practical design guide of sigma-delta modulators, from a top-down/bottom-up perspective, including mathematical models and analytical procedures, behavioural modeling in MATLAB/SIMULINK, macromodeling, and circuit-level implementation in Cadence Design FrameWork II, chip prototyping, and experimental characterization. Systematic compilation of cutting-edge sigma-delta modulators Complete description of SIMSIDES, a time-domain behavioural simulator implemented in MATLAB/SIMULINK Plenty of examples, case studies, and simulation test benches, covering the different stages of the design flow of sigma-delta modulators A number of electronic resources, including SIMSIDES, the statistical data used in the state-of-the-art survey, as well as many design examples and test benches are hosted on a companion website Essential reading for Researchers and electronics engineering practitioners interested in the design of high-performance data converters integrated in nanometer CMOS technologies; mixed-signal designers.
Author: Steven R. Norsworthy
Publisher: Wiley-IEEE Press
ISBN:
Category : Technology & Engineering
Languages : en
Pages : 522
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Book Description
This comprehensive guide offers a detailed treatment of the analysis, design, simulation and testing of the full range of today's leading delta-sigma data converters. Written by professionals experienced in all practical aspects of delta-sigma modulator design, Delta-Sigma Data Converters provides comprehensive coverage of low and high-order single-bit, bandpass, continuous-time, multi-stage modulators as well as advanced topics, including idle-channel tones, stability, decimation and interpolation filter design, and simulation.
Author: Shanthi Pavan
Publisher: John Wiley & Sons
ISBN: 1119258278
Category : Technology & Engineering
Languages : en
Pages : 596
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Book Description
This new edition introduces operation and design techniques for Sigma-Delta converters in physical and conceptual terms, and includes chapters which explore developments in the field over the last decade Includes information on MASH architectures, digital-to-analog converter (DAC) mismatch and mismatch shaping Investigates new topics including continuous-time ΔΣ analog-to-digital converters (ADCs) principles and designs, circuit design for both continuous-time and discrete-time ΔΣ ADCs, decimation and interpolation filters, and incremental ADCs Provides emphasis on practical design issues for industry professionals
Author: Jose M. de la Rosa
Publisher: John Wiley & Sons
ISBN: 1119275784
Category : Technology & Engineering
Languages : en
Pages : 581
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Book Description
Thoroughly revised and expanded to help readers systematically increase their knowledge and insight about Sigma-Delta Modulators Sigma-Delta Modulators (SDMs) have become one of the best choices for the implementation of analog/digital interfaces of electronic systems integrated in CMOS technologies. Compared to other kinds of Analog-to-Digital Converters (ADCs), Σ∆Ms cover one of the widest conversion regions of the resolution-versus-bandwidth plane, being the most efficient solution to digitize signals in an increasingly number of applications, which span from high-resolution low-bandwidth digital audio, sensor interfaces, and instrumentation, to ultra-low power biomedical systems and medium-resolution broadband wireless communications. Following the spirit of its first edition, Sigma-Delta Converters: Practical Design Guide, 2nd Edition takes a comprehensive look at SDMs, their diverse types of architectures, circuit techniques, analysis synthesis methods, and CAD tools, as well as their practical design considerations. It compiles and updates the current research reported on the topic, and explains the multiple trade-offs involved in the whole design flow of Sigma-Delta Modulators—from specifications to chip implementation and characterization. The book follows a top-down approach in order to provide readers with the necessary understanding about recent advances, trends, and challenges in state-of-the-art Σ∆Ms. It makes more emphasis on two key points, which were not treated so deeply in the first edition: It includes a more detailed explanation of Σ∆Ms implemented using Continuous-Time (CT) circuits, going from system-level synthesis to practical circuit limitations. It provides more practical case studies and applications, as well as a deeper description of the synthesis methodologies and CAD tools employed in the design of Σ∆ converters. Sigma-Delta Converters: Practical Design Guide, 2nd Edition serves as an excellent textbook for undergraduate and graduate students in electrical engineering as well as design engineers working on SD data-converters, who are looking for a uniform and self-contained reference in this hot topic. With this goal in mind, and based on the feedback received from readers, the contents have been revised and structured to make this new edition a unique monograph written in a didactical, pedagogical, and intuitive style.
Author: Mücahit Kozak
Publisher: Springer Science & Business Media
ISBN: 0306487284
Category : Technology & Engineering
Languages : en
Pages : 236
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Book Description
Oversampled Delta-Sigma Modulators: Analysis, Applications, and Novel Topologies presents theorems and their mathematical proofs for the exact analysis of the quantization noise in delta-sigma modulators. Extensive mathematical equations are included throughout the book to analyze both single-stage and multi-stage architectures. It has been proved that appropriately set initial conditions generate tone free output, provided that the modulator order is at least three. These results are applied to the design of a Fractional-N PLL frequency synthesizer to produce spurious free RF waveforms. Furthermore, the book also presents time-interleaved topologies to increase the conversion bandwidth of delta-sigma modulators. The topologies have been generalized for any interleaving number and modulator order. The book is full of design and analysis techniques and contains sufficient detail that enables readers with little background in the subject to easily follow the material in it.
