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Author: Kenneth M. Butler
Publisher: Springer Science & Business Media
ISBN: 1461536065
Category : Computers
Languages : en
Pages : 142
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Book Description
For many years, the dominant fault model in automatic test pattern gen eration (ATPG) for digital integrated circuits has been the stuck-at fault model. The static nature of stuck-at fault testing when compared to the extremely dynamic nature of integrated circuit (IC) technology has caused many to question whether or not stuck-at fault based testing is still viable. Attempts at answering this question have not been wholly satisfying due to a lack of true quantification, statistical significance, and/or high computational expense. In this monograph we introduce a methodology to address the ques tion in a manner which circumvents the drawbacks of previous approaches. The method is based on symbolic Boolean functional analyses using Or dered Binary Decision Diagrams (OBDDs). OBDDs have been conjectured to be an attractive representation form for Boolean functions, although cases ex ist for which their complexity is guaranteed to grow exponentially with input cardinality. Classes of Boolean functions which exploit the efficiencies inherent in OBDDs to a very great extent are examined in Chapter 7. Exact equa tions giving their OBDD sizes are derived, whereas until very recently only size bounds have been available. These size equations suggest that straight forward applications of OBDDs to design and test related problems may not prove as fruitful as was once thought.
Author: Kenneth M. Butler
Publisher: Springer Science & Business Media
ISBN: 1461536065
Category : Computers
Languages : en
Pages : 142
Get Book
Book Description
For many years, the dominant fault model in automatic test pattern gen eration (ATPG) for digital integrated circuits has been the stuck-at fault model. The static nature of stuck-at fault testing when compared to the extremely dynamic nature of integrated circuit (IC) technology has caused many to question whether or not stuck-at fault based testing is still viable. Attempts at answering this question have not been wholly satisfying due to a lack of true quantification, statistical significance, and/or high computational expense. In this monograph we introduce a methodology to address the ques tion in a manner which circumvents the drawbacks of previous approaches. The method is based on symbolic Boolean functional analyses using Or dered Binary Decision Diagrams (OBDDs). OBDDs have been conjectured to be an attractive representation form for Boolean functions, although cases ex ist for which their complexity is guaranteed to grow exponentially with input cardinality. Classes of Boolean functions which exploit the efficiencies inherent in OBDDs to a very great extent are examined in Chapter 7. Exact equa tions giving their OBDD sizes are derived, whereas until very recently only size bounds have been available. These size equations suggest that straight forward applications of OBDDs to design and test related problems may not prove as fruitful as was once thought.
Author: Pranav Ashar
Publisher: Springer Science & Business Media
ISBN: 9780792391876
Category : Computers
Languages : en
Pages : 256
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Book Description
Computer-aided design (CAD) of very large scale integrated (VLSI) circuits is concerned with the development of computer programs for the automated design and manufacture of ICs. Automated VLSI design is referred to as VLSI synthesis. Synthesis of VLSI circuits involves transforming a specification of circuit behavior into a mask-level layout which can be fabricated using VLSI manufacturing processes. Optimization strategies are vital in VLSI synthesis in order to meet desired specifications. However, the optimization problems encountered in VLSI synthesis are typically nondeterministic polynomial-time (NP)-complete or NP-hard. Therefore, solutions to the optimization problems incorporate heuristic strategies, the development of which requires a thorough understanding of the problem at hand. Thus, optimization-based VLSI synthesis has evolved into a rich and exciting area of research. Automata theory forms a cornerstone of digital VLSI system design. Sequential Logic Synthesis deals exclusively with finite automata theory and practice. The extensive use of finite state automata, finite state machines (FSMs) or simple sequential logic
Author:
Publisher:
ISBN:
Category : Application-specific integrated circuits
Languages : en
Pages : 664
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Book Description
Author: Hoang Pham
Publisher: World Scientific
ISBN: 9810242212
Category : Technology & Engineering
Languages : en
Pages : 346
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Book Description
This volume presents recent research in reliability and quality theory and its applications by many leading experts in the field. The subjects covered include reliability optimization, software reliability, maintenance, quality engineering, system reliability, Monte Carlo simulation, tolerance design optimization, manufacturing system estimation, neural networks, software quality assessment, optimization design of life tests, software quality, reliability-centered maintenance, multivariate control chart, methodology for measurement of test effectiveness, imperfect preventive maintenance, Markovian reliability modeling, accelerated life testing, and system availability assessment. The book will serve as a reference for postgraduate students and will also prove useful for practitioners and researchers in reliability and quality engineering.
Author: Marian Adamski
Publisher: Springer Science & Business Media
ISBN: 3642175457
Category : Technology & Engineering
Languages : en
Pages : 372
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Book Description
Logic design of digital devices is a very important part of the Computer Science. It deals with design and testing of logic circuits for both data-path and control unit of a digital system. Design methods depend strongly on logic elements using for implementation of logic circuits. Different programmable logic devices are wide used for implementation of logic circuits. Nowadays, we witness the rapid growth of new and new chips, but there is a strong lack of new design methods. This book includes a variety of design and test methods targeted on different digital devices. It covers methods of digital system design, the development of theoretical base for construction and designing of the PLD–based devices, application of UML for digital design. A considerable part of the book is devoted to design methods oriented on implementing control units using FPGA and CPLD chips. Such important issues as design of reliable FSMs, automatic design of concurrent logic controllers, the models and methods for creating infrastructure IP services for the SoCs are also presented. The editors of the book hope that it will be interesting and useful for experts in Computer Science and Electronics, as well as for students, who are viewed as designers of future digital devices and systems.
Author: Adarsh Anand
Publisher: Walter de Gruyter GmbH & Co KG
ISBN: 3110619059
Category : Technology & Engineering
Languages : en
Pages : 192
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Book Description
This book describes methods to improve software performance and safety using advanced mathematical and computational analytics. The main focus is laid on the increase of software reliability by preventive and predictive maintenance with efficient usage of modern testing resources. The editors collect contributions from international researchers in the field.
Author:
Publisher:
ISBN:
Category : Application-specific integrated circuits
Languages : en
Pages : 498
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Book Description
Author: Phillip A. Laplante
Publisher: CRC Press
ISBN: 1351249266
Category : Computers
Languages : en
Pages : 1441
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Book Description
Software engineering requires specialized knowledge of a broad spectrum of topics, including the construction of software and the platforms, applications, and environments in which the software operates as well as an understanding of the people who build and use the software. Offering an authoritative perspective, the two volumes of the Encyclopedia of Software Engineering cover the entire multidisciplinary scope of this important field. More than 200 expert contributors and reviewers from industry and academia across 21 countries provide easy-to-read entries that cover software requirements, design, construction, testing, maintenance, configuration management, quality control, and software engineering management tools and methods. Editor Phillip A. Laplante uses the most universally recognized definition of the areas of relevance to software engineering, the Software Engineering Body of Knowledge (SWEBOK®), as a template for organizing the material. Also available in an electronic format, this encyclopedia supplies software engineering students, IT professionals, researchers, managers, and scholars with unrivaled coverage of the topics that encompass this ever-changing field. Also Available Online This Taylor & Francis encyclopedia is also available through online subscription, offering a variety of extra benefits for researchers, students, and librarians, including: Citation tracking and alerts Active reference linking Saved searches and marked lists HTML and PDF format options Contact Taylor and Francis for more information or to inquire about subscription options and print/online combination packages. US: (Tel) 1.888.318.2367; (E-mail)
[email protected] International: (Tel) +44 (0) 20 7017 6062; (E-mail)
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Author: Said Hamdioui
Publisher: Springer Science & Business Media
ISBN: 1475767064
Category : Technology & Engineering
Languages : en
Pages : 231
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Book Description
Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of static random access memories (SRAMs), both single-port and multi-port. It contributes to the technical acknowledge needed by those involved in memory testing, engineers and researchers. The book begins with outlining the most popular SRAMs architectures. Then, the description of realistic fault models, based on defect injection and SPICE simulation, are introduced. Thereafter, high quality and low cost test patterns, as well as test strategies for single-port, two-port and any p-port SRAMs are presented, together with some preliminary test results showing the importance of the new tests in reducing DPM level. The impact of the port restrictions (e.g., read-only ports) on the fault models, tests, and test strategies is also discussed. Features: -Fault primitive based analysis of memory faults, -A complete framework of and classification memory faults, -A systematic way to develop optimal and high quality memory test algorithms, -A systematic way to develop test patterns for any multi-port SRAM, -Challenges and trends in embedded memory testing.
Author: Jürgen Becker
Publisher: Springer
ISBN: 3540301178
Category : Computers
Languages : en
Pages : 1226
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Book Description
This book contains the papers presented at the 14th International Conference on Field Programmable Logic and Applications (FPL) held during August 30th- September 1st 2004. The conference was hosted by the Interuniversity Micro- Electronics Center (IMEC) in Leuven, Belgium. The FPL series of conferences was founded in 1991 at Oxford University (UK), and has been held annually since: in Oxford (3 times), Vienna, Prague, Darmstadt, London, Tallinn, Glasgow, Villach, Belfast, Montpellier and Lisbon. It is the largest and oldest conference in reconfigurable computing and brings together academic researchers, industry experts, users and newcomers in an informal, welcoming atmosphere that encourages productive exchange of ideas and knowledge between the delegates. The fast and exciting advances in field programmable logic are increasing steadily with more and more application potential and need. New ground has been broken in architectures, design techniques, (partial) run-time reconfiguration and applications of field programmable devices in several different areas. Many of these recent innovations are reported in this volume. The size of the FPL conferences has grown significantly over the years. FPL in 2003 saw 216 papers submitted. The interest and support for FPL in the programmable logic community continued this year with 285 scientific papers submitted, demonstrating a 32% increase when compared to the year before. The technical program was assembled from 78 selected regular papers, 45 additional short papers and 29 posters, resulting in this volume of proceedings. The program also included three invited plenary keynote presentations from Xilinx, Gilder Technology Report and Altera, and three embedded tutorials from Xilinx, the Universit ̈ at Karlsruhe (TH) and the University of Oslo.
